- fixed bootloader
- bootloader added board file - refactored header files - constify constants git-svn-id: http://moon:8086/svn/mips@99 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
+21
-15
@@ -12,7 +12,7 @@ else
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ENDIAN_FLAGS=-EB
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endif
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CFLAGS=$(ENDIAN_FLAGS) -Os -I. -I../ -I../libsys -msoft-float -march=r3000 -G0
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CFLAGS=$(ENDIAN_FLAGS) -Os -I. -I../libsys -msoft-float -march=r3000 -G0 -I../libsys/boards/$(BOARD) -D$(BOARD)
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LFLAGS=$(ENDIAN_FLAGS)
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ifeq ($(TLB),yes)
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@@ -38,9 +38,15 @@ ROMGEN=$(MIPS_HOME)/tools/romgen
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all: $(BUILD_DIR) $(BUILD_DIR)/bootloader.elf $(BUILD_DIR)/bootloader_with_flash.elf
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OBJS-ml402=$(addprefix $(BUILD_DIR)/, startup.o kernel.o libsys.o)
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OBJS-denano=$(addprefix $(BUILD_DIR)/, startup.o kernel.o libsys.o)
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OBJS-ml402=$(addprefix $(BUILD_DIR)/, startup.o kernel.o libsys.o board.o uart.o)
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OBJS-denano=$(addprefix $(BUILD_DIR)/, startup.o kernel.o libsys.o board.o uart.o)
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$(BUILD_DIR)/uart.o : ../libsys/uart.c
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$(CC) $(CFLAGS) -c -o $@ $<
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$(BUILD_DIR)/board.o : boards/$(BOARD)/board.c
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$(CC) $(CFLAGS) -c -o $@ $<
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$(BUILD_DIR)/%.o : %.c
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$(CC) $(CFLAGS) -c -o $@ $<
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@@ -48,20 +54,20 @@ $(BUILD_DIR)/%.o : %.S
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$(CC) $(CFLAGS) -c -o $@ $<
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$(BUILD_DIR)/bootloader.elf: $(OBJS-$(BOARD)) bootloader.c
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$(CC) $(CFLAGS) -g -c bootloader.c
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$(LD) $(LFLAGS) $(LIB_DIRS) $(OBJS-$(BOARD)) bootloader.o -o $@.elf $(LIBS) >$@.map
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$(OBJDUMP) -D $@.elf > $@.dis
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$(OBJCOPY) $@.elf -j ROM --output-target=binary $@.ROM.bin
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$(OBJCOPY) -O srec $@.elf $@.srec
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$(CC) $(CFLAGS) -o $(BUILD_DIR)/bootloader.o -g -c bootloader.c
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$(LD) $(LFLAGS) $(LIB_DIRS) $(OBJS-$(BOARD)) bootloader.o -o $@ $(LIBS) >$@.map
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$(OBJDUMP) -D $@ > $@.dis
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$(OBJCOPY) $@ -j ROM --output-target=binary $@.ROM.bin
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$(OBJCOPY) -O srec $@ $@.srec
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$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
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$(BUILD_DIR)/bootloader_with_flash.elf: $(OBJS-$(BOARD)) bootloader_with_flash.c ../cfiflash.c
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$(CC) $(CFLAGS) -g -c bootloader_with_flash.c
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$(CC) $(CFLAGS) -g -c ../cfiflash.c
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$(LD) $(LFLAGS) $(LIB_DIRS) $(OBJS-$(BOARD)) cfiflash.o bootloader_with_flash.o -o $@.elf $(LIBS) >$@.map
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$(OBJDUMP) -D $@.elf > $@.dis
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$(OBJCOPY) $@.elf -j ROM --output-target=binary $@.ROM.bin
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$(OBJCOPY) -O srec $@.elf $@.srec
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$(CC) $(CFLAGS) -o $(BUILD_DIR)/bootloader_with_flash.o -g -c bootloader_with_flash.c
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$(CC) $(CFLAGS) -o $(BUILD_DIR)/cfiflash.o -g -c ../cfiflash.c
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$(LD) $(LFLAGS) $(LIB_DIRS) $(OBJS-$(BOARD)) cfiflash.o bootloader_with_flash.o -o $@ $(LIBS) >$@.map
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$(OBJDUMP) -D $@ > $@.dis
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$(OBJCOPY) $@ -j ROM --output-target=binary $@.ROM.bin
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$(OBJCOPY) -O srec $@ $@.srec
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$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
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$(BUILD_DIR):
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@@ -0,0 +1,89 @@
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/*
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* To change this license header, choose License Headers in Project Properties.
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* To change this template file, choose Tools | Templates
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* and open the template in the editor.
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*/
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#include <stddef.h>
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#include "../../../libsys/boards/denano/board.h"
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#include "../../../libsys/uart.h"
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#include "../../../libsys/irq.h"
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#define DEBUGGER gdb_stub
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extern uart_if_t uart_if[];
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#define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0]))
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static uart_if_t const *dbg_uart = NULL;
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static volatile uint32_t *pGpioData = (uint32_t*)SYS_GPIO_0_DATA;
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static volatile uint32_t *pGpioDir = (uint32_t*)SYS_GPIO_0_DIR;
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static uint32_t led_count = 0;
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extern int dbg_handler(struct xcptcontext * xcp);
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extern void handle_exception (unsigned long *registers);
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int gdb_stub(struct xcptcontext * xcp)
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{
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// handle_exception((unsigned long *)xcp);
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return 0;
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}
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void dbg_uart_isr(struct xcptcontext *xcp)
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{
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if(SYS_UART_BIT_RX_AVAIL & *dbg_uart->pCTRL)
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{
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char c = *dbg_uart->pDATA;
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if (c == 3)
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{
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DEBUGGER(xcp);
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}
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}
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}
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void dbg_uart_setup()
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{
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const int UART_INT = SYS_INT_UART1;
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dbg_uart = (uart_if_t*)&uart_if[1];
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*dbg_uart->pCTRL = SYS_UART_BIT_RX_INTEN;
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}
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inline void _dbg_writechar(uart_if_t const *pUart, char c)
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{
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while((SYS_UART_BIT_TX_HALFFULL & *pUart->pCTRL) != 0);
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*pUart->pDATA = (uint32_t)c;
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}
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inline char _dbg_readchar(uart_if_t const *pUart)
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{
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// busy read
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while(!(SYS_UART_BIT_RX_AVAIL & *pUart->pCTRL))
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{
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(*pGpioData) = (led_count++) >> 16;
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}
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led_count = 0;
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return (*pUart->pDATA & 0xFF);
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}
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void dbg_putchar(char c)
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{
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if (c == 0x0A)
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{
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_dbg_writechar(dbg_uart, 0x0D);
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}
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_dbg_writechar(dbg_uart, c);
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}
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char dbg_getchar()
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{
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return (char)_dbg_readchar(dbg_uart);
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}
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void board_init(void)
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{
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}
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@@ -0,0 +1,89 @@
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/*
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* To change this license header, choose License Headers in Project Properties.
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||||
* To change this template file, choose Tools | Templates
|
||||
* and open the template in the editor.
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||||
*/
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#include <stddef.h>
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#include "../../../libsys/boards/ml402/board.h"
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#include "../../../libsys/uart.h"
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#include "../../../libsys/irq.h"
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#define DEBUGGER gdb_stub
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extern uart_if_t uart_if[];
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#define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0]))
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static uart_if_t const *dbg_uart = NULL;
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static volatile uint32_t *pGpioData = (uint32_t*)SYS_GPIO_0_DATA;
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static volatile uint32_t *pGpioDir = (uint32_t*)SYS_GPIO_0_DIR;
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static uint32_t led_count = 0;
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extern int dbg_handler(struct xcptcontext * xcp);
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extern void handle_exception (unsigned long *registers);
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int gdb_stub(struct xcptcontext * xcp)
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{
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// handle_exception((unsigned long *)xcp);
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return 0;
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}
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void dbg_uart_isr(struct xcptcontext *xcp)
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{
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if(SYS_UART_BIT_RX_AVAIL & *dbg_uart->pCTRL)
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{
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char c = *dbg_uart->pDATA;
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if (c == 3)
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{
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DEBUGGER(xcp);
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}
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}
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}
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void dbg_uart_setup()
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{
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const int UART_INT = SYS_INT_UART;
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dbg_uart = (uart_if_t*)&uart_if[1];
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*dbg_uart->pCTRL = SYS_UART_BIT_RX_INTEN;
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}
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inline void _dbg_writechar(uart_if_t const *pUart, char c)
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{
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while((SYS_UART_BIT_TX_HALFFULL & *pUart->pCTRL) != 0);
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*pUart->pDATA = (uint32_t)c;
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}
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inline char _dbg_readchar(uart_if_t const *pUart)
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{
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// busy read
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while(!(SYS_UART_BIT_RX_AVAIL & *pUart->pCTRL))
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{
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(*pGpioData) = (led_count++) >> 16;
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}
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led_count = 0;
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return (*pUart->pDATA & 0xFF);
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}
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void dbg_putchar(char c)
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{
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if (c == 0x0A)
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{
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_dbg_writechar(dbg_uart, 0x0D);
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}
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_dbg_writechar(dbg_uart, c);
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}
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char dbg_getchar()
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{
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return (char)_dbg_readchar(dbg_uart);
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}
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void board_init(void)
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{
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}
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@@ -1,3 +1,4 @@
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#include <board.h>
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#include "libsys.h"
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#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian;
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@@ -1,5 +1,6 @@
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#include <board.h>
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#include "libsys.h"
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#include "cfiflash.h"
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#include "../cfiflash.h"
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#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian;
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#define MAGIC_EL 0x3149464A // "JFI1" in little-endian;
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@@ -235,7 +236,7 @@ int main(int argc, char *argv[])
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*pGPIO_DIR = GPIO_0_DFLT_DIR;
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*pGPIO_DATA = GPIO_0_DFLT_DATA;
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haddr = 0;
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block_sel = 0x7F & (uint32_t)((*pGPIO_DATA & GPIO_0_DIP) >> GPIO_0_ALIGN_DIP);
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block_sel = 0x7F & (uint32_t)((*pGPIO_DATA & GPIO_0_MASK_DIP) >> GPIO_0_ALIGN_DIP);
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sputs("\nMIPS bootloader\n");
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// ----------------------------------------------------------
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@@ -251,7 +252,7 @@ int main(int argc, char *argv[])
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ram32 = (uint32_t*)(SDRAM_BASE);
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pFlashIO = (uint32_t*)(SYS_FLASH_IO + flash_offset);
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if (!(((*pGPIO_DATA & GPIO_0_BTN) >> GPIO_0_ALIGN_BTN) & 8))
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if (!(((*pGPIO_DATA & GPIO_0_MASK_BTN) >> GPIO_0_ALIGN_BTN) & 8))
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{
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sputs("Loading image from flash at ");print_word(flash_offset);sputs("\n");
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pImg_hdr = (flash_img_hdr_t*)pFlashIO;
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+13
-17
@@ -5,6 +5,9 @@
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#include <errno.h>
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#include <stdlib.h>
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#include "libsys.h"
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#include "../../uart.h"
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extern uart_if_t uart_if[];
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// ---------------------------------------------------------------------------------
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void _exit(int reason)
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@@ -14,12 +17,6 @@ void _exit(int reason)
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while(1);
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}
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void libsys_init()
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{
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// Initialzie interrupt support
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// interrupt_init();
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}
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// MIPS specific
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uint32_t CP0_SR_read(void)
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{
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@@ -141,22 +138,21 @@ void DCACHE_invalidate_at(uint32_t* pPtr)
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// ---------------------------------------------------------------------------------
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char readchar(void)
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{
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volatile uint32_t *pUART_stat = (uint32_t*)SYS_UART_STAT;
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volatile uint32_t *pUART_data = (uint32_t*)SYS_UART_DATA;
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int c;
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while(!(0x10 & *pUART_stat));
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return (char)*pUART_data;
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// busy read
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do
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{
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c = UART_readchar(&uart_if[0]);
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} while(c < 0);
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return (char)c;
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}
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void writechar(char c)
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{
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volatile uint32_t *pUART_stat = (uint32_t*)SYS_UART_STAT;
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volatile uint32_t *pUART_data = (uint32_t*)SYS_UART_DATA;
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while((0x02 & *pUART_stat) != 0);
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*pUART_data = (uint32_t)c;
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UART_writechar(&uart_if[0], c);
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}
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void _putchar(char c)
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@@ -9,96 +9,6 @@
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#define LSYS_ERR_BASE 0x80000000
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#define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE)
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#ifndef SYS_IO_BASE
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#define SYS_IO_BASE 0xA0000000
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#endif
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#ifndef SDRAM_BASE
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#define SDRAM_BASE 0x40000000
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#endif
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#ifndef FLASH_BASE_IO
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#define FLASH_BASE_IO 0xA4000000
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#endif
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#ifndef FLASH_BASE_MEM
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#define FLASH_BASE_MEM 0x00000000
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#endif
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#define SYS_GPIO_0_DATA (SYS_IO_BASE + 0x0)
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#define SYS_GPIO_0_DIR (SYS_IO_BASE + 0x4)
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#define GPIO_0_DFLT_DIR (GPIO_0_LED | GPIO_0_USB_RST | GPIO_0_USB_INTEN | GPIO_0_AC97_INTEN | GPIO_0_PHY_RST | GPIO_0_PHY_MDC)
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#define GPIO_0_DFLT_DATA ((~GPIO_0_LED & GPIO_0_LED) | GPIO_0_USB_RST | (~GPIO_0_USB_INTEN & GPIO_0_USB_INTEN) | (~GPIO_0_AC97_INTEN & GPIO_0_AC97_INTEN) | GPIO_0_PHY_RST | (~GPIO_0_PHY_MDC & GPIO_0_PHY_MDC))
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#define GPIO_0_LED 0x000001FF
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#define GPIO_0_BTN 0x1F000000
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#define GPIO_0_DIP 0x00FF0000
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#define GPIO_0_USB_RST 0x00001000
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#define GPIO_0_USB_INTEN 0x00002000
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#define GPIO_0_AC97_INTEN 0x00008000
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#define GPIO_0_PHY_RST 0x20000000
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#define GPIO_0_PHY_MDC 0x40000000
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#define GPIO_0_PHY_MDIO 0x80000000
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#define GPIO_0_ALIGN_LED 0
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#define GPIO_0_ALIGN_DIP 16
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#define GPIO_0_ALIGN_BTN 24
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#define GPIO_0_ALIGN_MDIO 31
|
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|
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#define SYS_TIMER_USEC (SYS_IO_BASE + 0x8)
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#define SYS_TIMER_SEC (SYS_IO_BASE + 0xC)
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#define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18)
|
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#define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C)
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#define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20)
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#define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24)
|
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#define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28)
|
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#define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C)
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#define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30)
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#define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34)
|
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#define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38)
|
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#define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C)
|
||||
|
||||
#define SYS_UART_DATA (SYS_IO_BASE + 0x10000)
|
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#define SYS_UART_STAT (SYS_IO_BASE + 0x10004)
|
||||
#define SYS_UART_BAUD (SYS_IO_BASE + 0x10008)
|
||||
|
||||
#define SYS_SPI_STAT (SYS_IO_BASE + 0x20000)
|
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// Read
|
||||
#define SPI_STAT_CMDRDY (0x01)
|
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#define SPI_STAT_DINRDY (0x02)
|
||||
#define SPI_STAT_DOUTRDY (0x04)
|
||||
#define SPI_STAT_CMD_FIFO_FULL (0x0100)
|
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#define SPI_STAT_CMD_FIFO_EMPTY (0x0200)
|
||||
#define SPI_STAT_WRITE_FIFO_FULL (0x0400)
|
||||
#define SPI_STAT_WRITE_FIFO_EMPTY (0x0800)
|
||||
#define SPI_STAT_READ_FIFO_FULL (0x1000)
|
||||
#define SPI_STAT_READ_FIFO_EMPTY (0x2000)
|
||||
#define SPI_STAT_RX_VALID (0x4000)
|
||||
#define SPI_STAT_SPI_HOLD (0x8000)
|
||||
|
||||
// Write
|
||||
#define SPI_STAT_COMMIT (1)
|
||||
|
||||
#define SYS_SPI_XFER_SIZE (SYS_IO_BASE + 0x20004)
|
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#define SYS_SPI_DATA_SIZE (SYS_IO_BASE + 0x20008)
|
||||
#define SYS_SPI_DATA (SYS_IO_BASE + 0x2000C)
|
||||
#define SYS_SPI_CTRL (SYS_IO_BASE + 0x20010)
|
||||
|
||||
#define SYS_FLASH_IO FLASH_BASE_IO
|
||||
#define SYS_FLASH_MEM FLASH_BASE_MEM
|
||||
|
||||
// RTC
|
||||
#define SYS_TIMER_USEC (SYS_IO_BASE + 0x8)
|
||||
#define SYS_TIMER_SEC (SYS_IO_BASE + 0xC)
|
||||
|
||||
// TIMERs
|
||||
#define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18)
|
||||
#define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C)
|
||||
#define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20)
|
||||
#define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24)
|
||||
#define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28)
|
||||
#define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C)
|
||||
#define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30)
|
||||
#define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34)
|
||||
#define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38)
|
||||
#define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C)
|
||||
|
||||
// MIPS specific
|
||||
uint32_t CP0_SR_read(void);
|
||||
void CP0_SR_write(uint32_t val);
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
|
||||
.text
|
||||
.section .init,"ax"
|
||||
.extern board_init
|
||||
.align 2
|
||||
|
||||
_start:
|
||||
@@ -14,7 +15,7 @@ _start:
|
||||
# Kernel mode (SR[1]=0), Int disabled(SR[0]=0), after RFE into main
|
||||
li $26, 0x1040000C
|
||||
mtc0 $26, $12
|
||||
li $26, 0x00000000
|
||||
li $26, 0x00000000
|
||||
mtc0 $26, $13
|
||||
|
||||
mfc0 $26, $15
|
||||
@@ -36,14 +37,14 @@ $zeroise:
|
||||
addiu $8, 4
|
||||
|
||||
_init:
|
||||
# Call libsys_init
|
||||
la $k0, libsys_init
|
||||
# Call board_init
|
||||
la $k0, board_init
|
||||
jalr $k0
|
||||
nop
|
||||
|
||||
la $26, main
|
||||
la $k0, main
|
||||
|
||||
jalr $26
|
||||
jalr $k0
|
||||
nop
|
||||
_terminate:
|
||||
nop
|
||||
|
||||
Reference in New Issue
Block a user