jens/mips
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- bootloader multi target

Browse Source 
git-svn-id: http://moon:8086/svn/mips@98 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
jens
2017-01-18 17:47:36 +00:00
parent b552eceb84
commit 702cb814a1
8 changed files with 36 additions and 227 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/bootloader/Makefile
+33 -25
View File
@@ -1,9 +1,15 @@
ENDIAN='big'
# environment vaiables read:
# BOARD = {ml402, denano}
# TLB = {no, yes}
# ENDIANESS = {eb, el}
BOARD ?= ml402
TLB ?= no
ENDIANESS ?= eb
ifeq ($(ENDIAN), 'big')
ENDIAN_FLAGS=-EB
else
ifeq ($(ENDIANESS),el)
ENDIAN_FLAGS=-EL
else
ENDIAN_FLAGS=-EB
endif
CFLAGS=$(ENDIAN_FLAGS) -Os -I. -I../ -I../libsys -msoft-float -march=r3000 -G0
@@ -17,6 +23,8 @@ else
LFLAGS+=-T bootloader.ld
endif
BUILD_DIR=./build/$(BOARD)/$(ENDIANESS)
LIBS=-lc -lgcc
CFLAGS += -DXCP_SIZE=4096
@@ -28,40 +36,40 @@ ROMGEN=$(MIPS_HOME)/tools/romgen
.PHONY: libsys
all: bootloader_flash
all: $(BUILD_DIR) $(BUILD_DIR)/bootloader.elf $(BUILD_DIR)/bootloader_with_flash.elf
libsys: startup_boot.S kernel_boot.S libsys_boot.c
$(CC) $(CFLAGS) -c startup_boot.S -o startup.o
$(CC) $(CFLAGS) -c kernel_boot.S -o kernel.o
$(CC) $(CFLAGS) -c libsys_boot.c -o libsys.o
OBJS-ml402=$(addprefix $(BUILD_DIR)/, startup.o kernel.o libsys.o)
OBJS-denano=$(addprefix $(BUILD_DIR)/, startup.o kernel.o libsys.o)
$(BUILD_DIR)/%.o : %.c
$(CC) $(CFLAGS) -c -o $@ $<
bootloader: libsys bootloader.c
$(BUILD_DIR)/%.o : %.S
$(CC) $(CFLAGS) -c -o $@ $<
$(BUILD_DIR)/bootloader.elf: $(OBJS-$(BOARD)) bootloader.c
$(CC) $(CFLAGS) -g -c bootloader.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o libsys.o bootloader.o -o $@.elf $(LIBS) >$@.map
$(LD) $(LFLAGS) $(LIB_DIRS) $(OBJS-$(BOARD)) bootloader.o -o $@.elf $(LIBS) >$@.map
$(OBJDUMP) -D $@.elf > $@.dis
$(OBJCOPY) $@.elf -j ROM --output-target=binary $@.ROM.bin
$(OBJCOPY) -O srec $@.elf $@.srec
$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
bootloader_flash: libsys bootloader_with_flash.c
$(BUILD_DIR)/bootloader_with_flash.elf: $(OBJS-$(BOARD)) bootloader_with_flash.c ../cfiflash.c
$(CC) $(CFLAGS) -g -c bootloader_with_flash.c
$(CC) $(CFLAGS) -g -c ../cfiflash.c
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o libsys.o cfiflash.o bootloader_with_flash.o -o $@.elf $(LIBS) >$@.map
$(LD) $(LFLAGS) $(LIB_DIRS) $(OBJS-$(BOARD)) cfiflash.o bootloader_with_flash.o -o $@.elf $(LIBS) >$@.map
$(OBJDUMP) -D $@.elf > $@.dis
$(OBJCOPY) $@.elf -j ROM --output-target=binary $@.ROM.bin
$(OBJCOPY) -O srec $@.elf $@.srec
$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
test: libsys test.c ../libsys/irq.c ../libsys/kernel.S ../libsys/xcpt.c
$(CC) $(CFLAGS) -g -c test.c
$(CC) $(CFLAGS) -g -c ../libsys/irq.c
$(CC) $(CFLAGS) -g -c ../libsys/kernel.S
$(CC) $(CFLAGS) -c ../libsys/xcpt.c -o xcpt.o
$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o irq.o xcpt.o libsys.o test.o -o $@.elf $(LIBS) >$@.map
$(OBJDUMP) -D $@.elf > $@.dis
$(OBJCOPY) $@.elf -j ROM --output-target=binary $@.ROM.bin
$(OBJCOPY) -O ihex -I binary $@.ROM.bin $@.ihex
$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
$(BUILD_DIR):
mkdir -p $(BUILD_DIR)
clean:
rm -rf *.o *.bin *.map *.dis *.srec *.elf *.vhd* *.tcl bootloader > /dev/null
rm -rf $(BUILD_DIR)/*.* > /dev/null
mrproper:
rm -rf $(BUILD_DIR)
src/bootloader/bootloader.c
+1 -1
View File
@@ -1,4 +1,4 @@
#include "libsys_boot.h"
#include "libsys.h"
#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian;
#define MAGIC_EL 0x3149464A // "JFI1" in little-endian;
src/bootloader/bootloader_with_flash.c
+1 -1
View File
@@ -1,4 +1,4 @@
#include "libsys_boot.h"
#include "libsys.h"
#include "cfiflash.h"
#define MAGIC_EB 0x4A464931 // "JFI1" in big-endian;
src/bootloader/kernel_boot.S → src/bootloader/kernel.S
View File
src/bootloader/libsys_boot.c → src/bootloader/libsys.c
+1 -1
View File
@@ -4,7 +4,7 @@
#include <sys/stat.h>
#include <errno.h>
#include <stdlib.h>
#include "libsys_boot.h"
#include "libsys.h"
// ---------------------------------------------------------------------------------
void _exit(int reason)
src/bootloader/libsys_boot.h → src/bootloader/libsys.h
View File
src/bootloader/startup_boot.S → src/bootloader/startup.S
View File
src/bootloader/test.c
-199
View File
@@ -1,199 +0,0 @@
#include "libsys_boot.h"
#define ARRAY_SIZE(a) (sizeof(a)/sizeof(*a))
#define SDRAM_SIZE (256)
void uart_isr(void)
{
volatile uint32_t *pUART0_stat = (uint32_t*)SYS_UART_STAT;
volatile uint32_t *pUART0_data = (uint32_t*)SYS_UART_DATA;
while(0x200 & *pUART0_stat)
{
char data = (char)*pUART0_data;
sputs(&data);
}
}
void timer_isr(void)
{
static uint8_t led = 0;
volatile uint32_t *pTim_stat = (uint32_t*)SYS_ITIM_STAT;
volatile uint32_t *pTim_ctrl = (uint32_t*)SYS_ITIM_CTRL;
volatile uint32_t *pGPIO = (uint32_t*)SYS_GPIO_0_DATA;
if (*pTim_stat & 1)
{
*pGPIO = led;
led = (led+1) % 64;
*pTim_stat = 1; // Acknowledge IRQ
*pTim_ctrl |= 1;
}
}
void main()
{
uint32_t i, j, k;
uint32_t data;
volatile uint32_t *pUART0_stat = (uint32_t*)SYS_UART_STAT;
volatile uint32_t *pGPIODIR = (uint32_t*)SYS_GPIO_0_DIR;
volatile uint32_t pSDRAM32[SDRAM_SIZE/4];
volatile uint16_t *pSDRAM16 = (uint16_t*)pSDRAM32;
volatile uint8_t *pSDRAM8 = (uint8_t*)pSDRAM32;
volatile uint32_t *pFlashMem = (uint32_t*)FLASH_BASE_MEM + 0x100000/4;
volatile uint32_t *pTim_ctrl = (uint32_t*)SYS_ITIM_CTRL;
volatile uint32_t *pTim_stat = (uint32_t*)SYS_ITIM_STAT;
volatile uint32_t *pTim0_cnt = (uint32_t*)SYS_ITIM0_CNT;
volatile uint32_t *pTim0_cmp = (uint32_t*)SYS_ITIM0_CMP;
volatile uint32_t *pSpiXferSize = (uint32_t*)SYS_SPI_XFER_SIZE;
volatile uint32_t *pSpiDataSize = (uint32_t*)SYS_SPI_DATA_SIZE;
volatile uint32_t *pSpiData = (uint32_t*)SYS_SPI_DATA;
volatile uint32_t *pSpiStat = (uint32_t*)SYS_SPI_STAT;
volatile uint32_t *pSpiCtrl = (uint32_t*)SYS_SPI_CTRL;
*pTim0_cnt = 0;
*pTim0_cmp = 2500000; // 50 ms @ 50 Mhz
*pTim_stat = (1 << 0);
*pTim_ctrl = (3 << 0);
uint32_t test_pattern [] =
{
0x00000000,
0xFFFFFFFF,
0x55555555,
0xAAAAAAAA,
0x000000FF,
0x0000FF00,
0x00FF0000,
0xFF000000
};
CP0_SR_write(0x0060000D);
*pGPIODIR = GPIO_0_DFLT_DIR;
interrupt_init();
interrupt_register(3, (void*)uart_isr);
interrupt_register(2, (void*)timer_isr);
interrupt_enable(2);
interrupt_enable(3);
// UART: enable RX interrupt
*pUART0_stat |= (1 << 6);
sputs("Hello, world!\n");
k = 0;
while(1)
{
sputs("Iteration # ");print_word(k);sputs("\n");
#if 0
// SPI Bit rate
// fsys / (2*(1+div))
*pSpiCtrl = (*pSpiCtrl & 0xFFFFFF00) | 0;
sputs("Test SPI\n");
*pSpiData = 0x9F000000;
*pSpiDataSize = 8;
*pSpiXferSize = 8+648;
*pSpiStat = SPI_STAT_COMMIT;
sputs("SYS_SPI_XFER_SIZE : ");print_word(*pSpiXferSize);sputs("\n");
sputs("SYS_SPI_DATA_SIZE : ");print_word(*pSpiDataSize);sputs("\n");
sputs("SYS_SPI_CTRL : ");print_word(*pSpiCtrl);sputs("\n");
sputs("SYS_SPI_STAT : ");print_word(*pSpiStat);sputs("\n");
while(!(*pSpiStat & SPI_STAT_DOUTRDY))
{
}
do
{
print_word(*pSpiData);sputs("\n");
} while (*pSpiStat & SPI_STAT_DOUTRDY);
sputs("SPI: Read at 0x100000\n");
*pSpiData = 0x03100000;
*pSpiDataSize = 32;
*pSpiXferSize = 32+8*256;
*pSpiStat = SPI_STAT_COMMIT;
while(!(*pSpiStat & SPI_STAT_DOUTRDY))
{
}
do
{
print_word(*pSpiData);sputs("\n");
} while (*pSpiStat & SPI_STAT_DOUTRDY);
#endif
sputs("Testing SDRAM (pattern)\n");
for (j=0; j < ARRAY_SIZE(test_pattern); j++)
{
for (i=0; i < SDRAM_SIZE/4; i++)
{
pSDRAM32[i] = test_pattern[j];
}
DCACHE_invalidate_all();
for (i=0; i < SDRAM_SIZE/4; i++)
{
data = pSDRAM32[i];
if (data != test_pattern[j])
{
sputs("\n");
sputs("Pattern "); print_word(test_pattern[j]); sputs("\n");
sputs("Error at address "); print_word(i); sputs("\n");
sputs("Read "); print_word(data); sputs("\n");
break;
}
}
sputs(".");
}
sputs("\n");
sputs("Reading SPI Flash\n");
DCACHE_invalidate_all();
memdump((uint8_t*)pFlashMem, 0, 16, 512);
sputs("\n");
sputs("Size "); print_word(*(pFlashMem+3)); sputs("\n");
sputs("Testing SDRAM (32-bit write)\n");
data = 0x00010203;
for (i=0; i < 256/4; i++)
{
pSDRAM32[i] = data;
data += 0x04040404;
}
DCACHE_invalidate_all();
memdump((uint8_t*)pSDRAM32, 0, 16, 256);
sputs("\n");
sputs("Testing SDRAM (16-bit write)\n");
data = 0x0001;
for (i=0; i < 256/2; i++)
{
pSDRAM16[i] = data;
data += 0x0202;
}
DCACHE_invalidate_all();
memdump((uint8_t*)pSDRAM16, 0, 16, 256);
sputs("\n");
sputs("Testing SDRAM (8-bit write)\n");
data = 0x00;
for (i=0; i < 256; i++)
{
pSDRAM8[i] = data;
data += 0x01;
}
DCACHE_invalidate_all();
memdump((uint8_t*)pSDRAM8, 0, 16, 256);
sputs("\n");
k++;
}
}