[Bootloader]
- use full featured exception handler - cleaned up Linker script - added exception and interrupt processing git-svn-id: http://moon:8086/svn/mips@26 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
+10
-7
@@ -31,14 +31,15 @@ ROMGEN=$(MIPS_HOME)/tools/romgen
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all: bootloader_flash
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libsys: startup_boot.S kernel_boot.S libsys_boot.c
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libsys: startup_boot.S kernel_boot.S libsys_boot.c ../libsys/xcpt.c
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$(CC) $(CFLAGS) -c startup_boot.S -o startup.o
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$(CC) $(CFLAGS) -c kernel_boot.S -o kernel.o
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$(CC) $(CFLAGS) -c libsys_boot.c -o libsys.o
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$(CC) $(CFLAGS) -c ../libsys/xcpt.c -o xcpt.o
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bootloader: libsys bootloader.c
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$(CC) $(CFLAGS) -g -c bootloader.c
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$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o libsys.o bootloader.o -o $@.elf $(LIBS) >$@.map
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$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o xcpt.o libsys.o bootloader.o -o $@.elf $(LIBS) >$@.map
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$(OBJDUMP) -D $@.elf > $@.dis
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$(OBJCOPY) $@.elf -O binary $@.ROM.bin
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$(OBJCOPY) -O srec $@.elf $@.srec
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@@ -53,13 +54,15 @@ bootloader_flash: libsys bootloader_with_flash.c
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$(OBJCOPY) -O srec $@.elf $@.srec
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$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
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test: libsys test.c
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test: libsys test.c ../libsys/irq.c ../libsys/xcpt.c
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$(CC) $(CFLAGS) -g -c test.c
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$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o libsys.o test.o -o $@.elf $(LIBS) >$@.map
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$(OBJDUMP) -d $@.elf > $@.dis
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$(OBJCOPY) $@.elf -O binary $@.ROM.bin
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$(CC) $(CFLAGS) -g -c ../libsys/irq.c
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$(CC) $(CFLAGS) -g -c ../libsys/xcpt.c
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$(LD) $(LFLAGS) $(LIB_DIRS) startup.o kernel.o libsys.o irq.o xcpt.o test.o -o $@.elf $(LIBS) >$@.map
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$(OBJDUMP) -D $@.elf > $@.dis
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$(OBJCOPY) $@.elf -j ROM --output-target=binary $@.ROM.bin
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$(OBJCOPY) -O srec $@.elf $@.srec
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$(ROMGEN) $@.ROM.bin 10 $(ENDIAN_FLAGS)
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$(ROMGEN) $@.ROM.bin 11 $(ENDIAN_FLAGS)
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clean:
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rm -rf *.o *.bin *.map *.dis *.srec *.elf *.vhd* *.tcl bootloader > /dev/null
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@@ -18,27 +18,16 @@ sys_timer_sec = 0xA000000C;
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SECTIONS
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{
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.init ORIGIN(rom) :
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ROM :
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{
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start = ALIGN(4);
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entry = ALIGN(4);
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_entry = ALIGN(4);
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__entry = ALIGN(4);
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*(.init)
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} > rom
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.ktext ORIGIN(rom) + 0x180 :
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{
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. = ORIGIN(rom) + 0x180;
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*(.ktext)
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} > rom
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.text . :
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{
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*(.text)
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} > rom
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.rodata . :
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{
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*(.text*)
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*(.rodata*)
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} > rom
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+173
-26
@@ -1,3 +1,6 @@
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#include <regdef.h>
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#include <xcpt_asm.h>
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.file "kernel.S"
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.section .ktext,"ax"
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@@ -13,34 +16,178 @@
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addiu $sp, -4
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.endm
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_exc_handler:
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.set noreorder
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LEAF(_xcpt_handler)
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.set noreorder
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.set noat
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/* Note: exceptions do not save and restore registers k0 and k1.
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* on entry, k1 = exception class.
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*/
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# Set Error LED and ExcCode LEDs
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# Get Cause
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mfc0 $26, $13
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li $27, 0xC0000000
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srl $26, 2
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andi $26, 0x000F
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or $26, $27
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la $27, sys_led_port
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sw $26, 0($27)
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/* allocate exception stack frame (on 8-byte boundary) */
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subu k1, sp, XCP_SIZE
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srl k1, 3 /* shift right/left -> alligned on boundary */
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sll k1, 3
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# wait for all interrupts = 0
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$w4x: mfc0 $26, $13
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nop
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srl $26, 8
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andi $26, 0xFF
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bnez $26, $w4x
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nop
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/* save enough registers to get by */
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sw AT, XCP_AT(k1)
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sw v0, XCP_V0(k1)
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sw v1, XCP_V1(k1)
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sw a0, XCP_A0(k1)
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sw a1, XCP_A1(k1)
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sw a2, XCP_A2(k1)
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sw a3, XCP_A3(k1)
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sw sp, XCP_SP(k1)
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sw ra, XCP_RA(k1)
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# Get return address
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mfc0 $26, $14
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/* get coprocessor 0 exception state */
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mfc0 a0, CP0_CR
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mfc0 a1, CP0_SR
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mfc0 a2, CP0_BADDR
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mfc0 a3, CP0_EPC
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# Return
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nop
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jr $26
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/* we can safely use AT now */
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.set at
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/* switch to using sp to point at exception frame */
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move sp, k1
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/* nothing sensible to store for k0/k1, store zero */
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sw zero, XCP_K0(sp)
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sw zero, XCP_K1(sp)
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/* we are now interruptible: dump all remaining state
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* into the exception stack frame.
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*/
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/* coprocessor exception state */
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sw a0, XCP_CR(sp)
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sw a1, XCP_SR(sp)
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sw a2, XCP_BADDR(sp)
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sw a3, XCP_EPC(sp)
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/* mdhi and mdlo */
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mfhi v0
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mflo v1
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sw v0, XCP_MDHI(sp)
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sw v1, XCP_MDLO(sp)
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/* Save all the other general registers.
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* We save zero, s0-s7 and s8 as well, as instruction emulators (e.g. FP
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* operations) and debuggers rely on all registers stored together in
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* well-defined structure.
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*/
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sw zero, XCP_ZERO(sp)
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sw t0, XCP_T0(sp)
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sw t1, XCP_T1(sp)
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sw t2, XCP_T2(sp)
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sw t3, XCP_T3(sp)
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sw t4, XCP_T4(sp)
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sw t5, XCP_T5(sp)
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sw t6, XCP_T6(sp)
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sw t7, XCP_T7(sp)
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sw s0, XCP_S0(sp)
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sw s1, XCP_S1(sp)
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sw s2, XCP_S2(sp)
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sw s3, XCP_S3(sp)
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sw s4, XCP_S4(sp)
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sw s5, XCP_S5(sp)
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sw s6, XCP_S6(sp)
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sw s7, XCP_S7(sp)
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sw t8, XCP_T8(sp)
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sw t9, XCP_T9(sp)
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sw gp, XCP_GP(sp)
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sw s8, XCP_S8(sp)
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/* I don't know what the following does. [rb] */
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/* load our _gp pointer */
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# la gp, _gp
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/* and call the C exception handler */
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move a0, sp # arg1 = &xcp
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subu sp, 16 # (arg save area)
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j _xcpt_call
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move ra, zero # fake return address
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/* This strange call to _xcpt_call with zero return address is to
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* help exception-aware debuggers to trace back over the exception event.
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* We are basically interposing a bogus stackframe (with a zero return
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* address) between the C exception handler and the actual machine
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* exception.
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*/
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$xcptrest:
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.set noat
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add AT, sp, 16
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/* at points to exception frame */
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$xcptrestother:
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/* restore all state */
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/* restore most general registers */
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lw t0, XCP_T0(AT)
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lw t1, XCP_T1(AT)
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lw t2, XCP_T2(AT)
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lw t3, XCP_T3(AT)
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lw t4, XCP_T4(AT)
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lw t5, XCP_T5(AT)
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lw t6, XCP_T6(AT)
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lw t7, XCP_T7(AT)
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lw s0, XCP_S0(AT)
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lw s1, XCP_S1(AT)
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lw s2, XCP_S2(AT)
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lw s3, XCP_S3(AT)
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lw s4, XCP_S4(AT)
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lw s5, XCP_S5(AT)
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lw s6, XCP_S6(AT)
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lw s7, XCP_S7(AT)
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lw t8, XCP_T8(AT)
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lw t9, XCP_T9(AT)
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lw gp, XCP_GP(AT)
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lw s8, XCP_S8(AT)
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/* mdhi and mdlo */
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lw v0, XCP_MDHI(AT)
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lw v1, XCP_MDLO(AT)
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mthi v0
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mtlo v1
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/* remaining general registers */
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lw a0, XCP_A0(AT)
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lw a1, XCP_A1(AT)
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lw a2, XCP_A2(AT)
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lw a3, XCP_A3(AT)
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lw ra, XCP_RA(AT)
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/* restore the exception-time status register */
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.set noreorder
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lw v0, XCP_SR(AT)
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nop
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mtc0 v0, CP0_SR
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lw v1, XCP_V1(AT)
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lw v0, XCP_V0(AT)
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lw sp, XCP_SP(AT)
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/* we are not uninterruptible and can use k1 safely */
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lw k1, XCP_EPC(AT)
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lw AT, XCP_AT(AT)
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mtc0 k1, CP0_EPC
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j k1
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rfe
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.set reorder
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.set reorder
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.set at
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END(_xcpt_handler)
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LEAF(_xcpt_call)
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/* on entry: a0 == &xcp */
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subu sp, 24
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sw ra, 16(sp)
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/* punt out to _xcpt_deliver */
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jal _xcpt_deliver
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nop
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lw ra, 16(sp)
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addu sp, 24
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beqz ra, $xcptrest
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nop
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j ra
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nop
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END(_xcpt_call)
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@@ -7,6 +7,16 @@
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#include "libsys_boot.h"
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// ---------------------------------------------------------------------------------
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void _exit(int reason)
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{
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}
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void libsys_init()
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{
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// Initialzie interrupt support
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interrupt_init();
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}
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// MIPS specific
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uint32_t CP0_SR_read(void)
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{
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@@ -3,6 +3,7 @@ void main()
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{
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uint32_t i;
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volatile uint32_t *pUART0_stat = (uint32_t*)SYS_UART_STAT;
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volatile uint32_t *pGPIO = (uint32_t*)SYS_GPIO_0_DATA;
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volatile uint32_t *pGPIODIR = (uint32_t*)SYS_GPIO_0_DIR;
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volatile uint32_t *pRAM = (uint32_t*)SDRAM_BASE;
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@@ -10,21 +11,23 @@ void main()
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*pGPIODIR = GPIO_0_DFLT_DIR;
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uint8_t led = 0;
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// UART: enable RX interrupt
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*pUART0_stat |= (1 << 6);
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interrupt_enable(3);
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sputs("Hello, world!\n");
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while(1)
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{
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sputs("Iteration # ");print_word(led);sputs("\n");
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sputs("Uart status : ");print_word(*pUART0_stat);sputs("\n");
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sputs("CPU status : ");print_word(CP0_SR_read());sputs("\n");
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*pGPIO = led;
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if(led == 0)
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{
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memdump((uint8_t*)pRAM, 0, 16, 256);
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}
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*pGPIO = led;
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for (i=0; i < 1024*1024; i++)
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{
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pRAM[i] = i;
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}
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led = (led+1) % 64;
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}
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*pGPIO = 1;
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