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- added timer ISR

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git-svn-id: http://moon:8086/svn/mips@42 a8ebac50-d88d-4704-bea3-6648445a41b3
This commit is contained in:
jens
2015-05-31 14:12:30 +00:00
parent 9adb5ab13b
commit 4919f53484
2 changed files with 63 additions and 13 deletions
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src/bootloader/libsys_boot.h
+27
View File
@@ -43,6 +43,17 @@
#define SYS_TIMER_USEC (SYS_IO_BASE + 0x8)
#define SYS_TIMER_SEC (SYS_IO_BASE + 0xC)
#define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18)
#define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C)
#define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20)
#define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24)
#define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28)
#define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C)
#define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30)
#define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34)
#define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38)
#define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C)
#define SYS_UART_DATA (SYS_IO_BASE + 0x10000)
#define SYS_UART_STAT (SYS_IO_BASE + 0x10004)
#define SYS_UART_BAUD (SYS_IO_BASE + 0x10008)
@@ -53,6 +64,22 @@
#define SYS_FLASH_IO 0xA4000000
#define SYS_FLASH_MEM 0x00000000
// RTC
#define SYS_TIMER_USEC (SYS_IO_BASE + 0x8)
#define SYS_TIMER_SEC (SYS_IO_BASE + 0xC)
// TIMERs
#define SYS_ITIM_CTRL (SYS_IO_BASE + 0x18)
#define SYS_ITIM_STAT (SYS_IO_BASE + 0x1C)
#define SYS_ITIM0_CNT (SYS_IO_BASE + 0x20)
#define SYS_ITIM1_CNT (SYS_IO_BASE + 0x24)
#define SYS_ITIM2_CNT (SYS_IO_BASE + 0x28)
#define SYS_ITIM3_CNT (SYS_IO_BASE + 0x2C)
#define SYS_ITIM0_CMP (SYS_IO_BASE + 0x30)
#define SYS_ITIM1_CMP (SYS_IO_BASE + 0x34)
#define SYS_ITIM2_CMP (SYS_IO_BASE + 0x38)
#define SYS_ITIM3_CMP (SYS_IO_BASE + 0x3C)
// MIPS specific
uint32_t CP0_SR_read(void);
void CP0_SR_write(uint32_t val);
src/bootloader/test.c
+36 -13
View File
@@ -3,7 +3,7 @@
#define ARRAY_SIZE(a) (sizeof(a)/sizeof(*a))
#define SDRAM_SIZE (32*1024*1024)
void handler3(void)
void uart_isr(void)
{
volatile uint32_t *pUART0_stat = (uint32_t*)SYS_UART_STAT;
volatile uint32_t *pUART0_data = (uint32_t*)SYS_UART_DATA;
@@ -15,17 +15,42 @@ void handler3(void)
}
}
void timer_isr(void)
{
static uint8_t led = 0;
volatile uint32_t *pTim_stat = (uint32_t*)SYS_ITIM_STAT;
volatile uint32_t *pTim_ctrl = (uint32_t*)SYS_ITIM_CTRL;
volatile uint32_t *pGPIO = (uint32_t*)SYS_GPIO_0_DATA;
if (*pTim_stat & 1)
{
*pGPIO = led;
led = (led+1) % 64;
*pTim_stat = 1; // Acknowledge IRQ
*pTim_ctrl |= 1;
}
}
void main()
{
uint32_t i, j;
uint32_t i, j, k;
uint32_t data;
uint8_t led = 0;
volatile uint32_t *pUART0_stat = (uint32_t*)SYS_UART_STAT;
volatile uint32_t *pGPIO = (uint32_t*)SYS_GPIO_0_DATA;
volatile uint32_t *pGPIODIR = (uint32_t*)SYS_GPIO_0_DIR;
volatile uint32_t *pSDRAM32 = (uint32_t*)FLASH_BASE_MEM;
volatile uint16_t *pSDRAM16 = (uint16_t*)FLASH_BASE_MEM;
volatile uint8_t *pSDRAM8 = (uint8_t*)FLASH_BASE_MEM;
volatile uint32_t *pTim_ctrl = (uint32_t*)SYS_ITIM_CTRL;
volatile uint32_t *pTim_stat = (uint32_t*)SYS_ITIM_STAT;
volatile uint32_t *pTim0_cnt = (uint32_t*)SYS_ITIM0_CNT;
volatile uint32_t *pTim0_cmp = (uint32_t*)SYS_ITIM0_CMP;
*pTim0_cnt = 0;
*pTim0_cmp = 25000000;
*pTim_stat = (1 << 0);
*pTim_ctrl = (3 << 0);
uint32_t test_pattern [] =
{
@@ -45,19 +70,19 @@ void main()
*pGPIODIR = GPIO_0_DFLT_DIR;
interrupt_init();
interrupt_register(3, (void*)handler3);
interrupt_register(3, (void*)uart_isr);
interrupt_register(2, (void*)timer_isr);
interrupt_enable(2);
interrupt_enable(3);
// UART: enable RX interrupt
*pUART0_stat |= (1 << 6);
sputs("Hello, world!\n");
k = 0;
while(1)
{
sputs("Iteration # ");print_word(led);sputs("\n");
*pGPIO = led;
sputs("Iteration # ");print_word(k);sputs("\n");
sputs("Testing SDRAM (pattern)\n");
for (j=0; j < ARRAY_SIZE(test_pattern); j++)
{
@@ -114,10 +139,8 @@ void main()
DCACHE_invalidate_all();
memdump((uint8_t*)pSDRAM8, 0, 16, 256);
sputs("\n");
led = (led+1) % 64;
k++;
}
*pGPIO = 1;
}