- moved PCB for HendiControl

This commit is contained in:
2022-06-30 17:52:16 +02:00
parent b3c1ca49d0
commit 04cc9f61fd
8 changed files with 4 additions and 11173 deletions
-51
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# FT232BL
#
DEF FT232BL U 0 40 Y Y 1 F N
F0 "U" -750 1200 50 H V L CNN
F1 "FT232BL" 450 1200 50 H V L CNN
F2 "Package_QFP:LQFP-32_7x7mm_P0.8mm" 750 -1350 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
LQFP*7x7mm*P0.8mm*
$ENDFPLIST
DRAW
S -750 1150 750 -1150 0 1 10 f
X EESK 1 900 -700 150 L 50 50 1 1 O
X ~SLEEP 10 -900 -800 150 R 50 50 1 1 O
X ~RXLED 11 -900 -700 150 R 50 50 1 1 I
X ~TXLED 12 -900 -400 150 R 50 50 1 1 O
X VCCIO 13 -300 1300 150 D 50 50 1 1 W
X PWRCTL 14 -900 -300 150 R 50 50 1 1 I
X ~PWREN 15 -900 0 150 R 50 50 1 1 I
X TXDEN 16 -900 100 150 R 50 50 1 1 I
X GND 17 0 -1300 150 U 50 50 1 1 W
X D7/~RI 18 -900 300 150 R 50 50 1 1 B
X D6/~DCD 19 -900 400 150 R 50 50 1 1 B
X EEDATA 2 900 -800 150 L 50 50 1 1 B
X D5/~DSR 20 -900 500 150 R 50 50 1 1 B
X D4/~DTR 21 -900 600 150 R 50 50 1 1 B
X D3/~CTS 22 -900 700 150 R 50 50 1 1 B
X D2/~RST 23 -900 800 150 R 50 50 1 1 B
X D1/RXD 24 -900 900 150 R 50 50 1 1 B
X D0/TXD 25 -900 1000 150 R 50 50 1 1 B
X VCC 26 -100 1300 150 D 50 50 1 1 W
X XTIN 27 900 -100 150 L 50 50 1 1 I
X XTOUT 28 900 -400 150 L 50 50 1 1 O
X AGND 29 200 -1300 150 U 50 50 1 1 W
X VCC 3 0 1300 150 D 50 50 1 1 W
X AVCC 30 200 1300 150 D 50 50 1 1 I
X TEST 31 900 -1000 150 L 50 50 1 1 I
X EECS 32 900 -600 150 L 50 50 1 1 B
X ~RESET 4 900 100 150 L 50 50 1 1 I
X ~RSTOUT 5 900 300 150 L 50 50 1 1 O
X 3V3OUT 6 900 1000 150 L 50 50 1 1 w
X USBDP 7 900 600 150 L 50 50 1 1 B
X USBDM 8 900 800 150 L 50 50 1 1 B
X GND 9 -100 -1300 150 U 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library
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-43
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update=Fr 29 Mär 2019 07:46:44 CET
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
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-107
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74LVC1G125
#
DEF 74LVC1G125 U 0 40 Y Y 1 F N
F0 "U" -100 150 50 H V C CNN
F1 "74LVC1G125" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74AHC1G125 74AHCT1G125 74AUC1G125 74AUP1G125
$FPLIST
SOT*
SG-*
$ENDFPLIST
DRAW
P 4 0 1 10 -150 100 -150 -100 100 0 -150 100 N
X ~ 1 0 200 150 D 40 40 1 1 I I
X ~ 2 -300 0 150 R 40 40 1 1 I
X GND 3 50 -50 0 D 40 40 1 1 W N
X ~ 4 250 0 150 L 40 40 1 1 T
X VCC 5 50 50 0 U 40 40 1 1 W N
ENDDRAW
ENDDEF
#
# 74LVC1G126
#
DEF 74LVC1G126 U 0 40 Y Y 1 F N
F0 "U" -100 150 50 H V C CNN
F1 "74LVC1G126" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 74AHC1G126 74AHCT1G126 74AUC1G126 74AUP1G126
$FPLIST
SOT*
SG-*
$ENDFPLIST
DRAW
P 4 0 1 10 -150 100 -150 -100 100 0 -150 100 N
X ~ 1 0 200 155 D 40 40 1 1 I
X ~ 2 -300 0 150 R 40 40 1 1 I
X GND 3 50 -50 0 D 40 40 1 1 W N
X ~ 4 250 0 150 L 40 40 1 1 T
X VCC 5 50 50 0 U 40 40 1 1 W N
ENDDRAW
ENDDEF
#
# FT232RL
#
DEF FT232RL U 0 40 Y Y 1 F N
F0 "U" -650 900 50 H V L CNN
F1 "FT232RL" 400 900 50 H V L CNN
F2 "Package_SO:SSOP-28_5.3x10.2mm_P0.65mm" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SSOP*5.3x10.2mm*P0.65mm*
$ENDFPLIST
DRAW
S -650 850 650 -850 0 1 10 f
X TXD 1 800 700 150 L 50 50 1 1 O
X DCD 10 800 100 150 L 50 50 1 1 I L
X CTS 11 800 400 150 L 50 50 1 1 I L
X CBUS4 12 800 -700 150 L 50 50 1 1 B
X CBUS2 13 800 -500 150 L 50 50 1 1 B
X CBUS3 14 800 -600 150 L 50 50 1 1 B
X USBD+ 15 -800 350 150 R 50 50 1 1 B
X USBD- 16 -800 450 150 R 50 50 1 1 B
X 3V3OUT 17 -800 -600 150 R 50 50 1 1 I
X GND 18 100 -1000 150 U 50 50 1 1 W
X ~RESET~ 19 -800 0 150 R 50 50 1 1 I
X DTR 2 800 300 150 L 50 50 1 1 O V
X VCC 20 100 1000 150 D 50 50 1 1 W
X GND 21 200 -1000 150 U 50 50 1 1 W
X CBUS1 22 800 -400 150 L 50 50 1 1 O
X CBUS0 23 800 -300 150 L 50 50 1 1 B
X AGND 25 -200 -1000 150 U 50 50 1 1 W
X TEST 26 -800 -750 150 R 50 50 1 1 W
X OSCI 27 -800 -200 150 R 50 50 1 1 I
X OSCO 28 -800 -400 150 R 50 50 1 1 O
X RTS 3 800 500 150 L 50 50 1 1 O V
X VCCIO 4 -100 1000 150 D 50 50 1 1 I
X RXD 5 800 600 150 L 50 50 1 1 I
X RI 6 800 0 150 L 50 50 1 1 I L
X GND 7 0 -1000 150 U 50 50 1 1 W
X DCR 9 800 200 150 L 50 50 1 1 I L
ENDDRAW
ENDDEF
#
# MCP47x6
#
DEF MCP47x6 U 0 40 Y Y 1 F N
F0 "U" -350 350 50 H V C CNN
F1 "MCP47x6" 250 -450 50 H V C CNN
F2 "" -300 450 50 H I C CNN
F3 "" -300 450 50 H I C CNN
DRAW
P 6 1 0 10 500 0 200 300 -400 300 -400 -300 200 -300 500 0 f
X VOUT 1 600 0 100 L 50 50 1 1 O
X VSS 2 -100 -400 100 U 50 50 1 1 W
X VDD 3 -100 400 100 D 50 50 1 1 W
X SDA 4 -500 -100 100 R 50 50 1 1 I
X SCL 5 -500 100 100 R 50 50 1 1 I C
X VREF 6 100 400 100 D 50 50 1 1 W
ENDDRAW
ENDDEF
#
#End Library
-3
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(sym_lib_table
(lib (name MyLib)(type Legacy)(uri /home/jens/work/HendiControl/Control/PCB/HendiControl/MyLib.lib)(options "")(descr ""))
)
+4
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PCB for HendiControl moved to
git@betelgeuse:/home/git/repos/hardware/pcbs/hendicontrol.git