- introduced generic UART-lowlevel I/O with interface object (less functions, which do the same) - added PS2-I/O and keycode translator (quick'n dirty) - writechar(), readchar() and _putchar() have now a port parameter - there are now 3 console interfaces available UART0, UART1 and PS2/VGA - the small function GetPort() maps between filei ID and low-level port - the small function GetPort() maps between Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@623 cc03376c-175c-47c8-b038-4cd826a8556b
158 lines
4.7 KiB
C
158 lines
4.7 KiB
C
#ifndef LIBSYS_H
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#define LIBSYS_H
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// ---------------------------------------------------------
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// Types
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// ---------------------------------------------------------
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#define INT8 signed char
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#define INT16 signed short
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#define INT32 signed int
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#define INT64 signed long long
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#define UINT8 unsigned char
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#define UINT16 unsigned short
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#define UINT32 unsigned int
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#define UINT64 unsigned long long
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#define INT INT32
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#define UINT UINT32
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#define FLOAT32 float
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#define FLOAT64 double
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#define NO_ERROR LSYS_SUCCESS
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#define ERROR LSYS_ERR_BASE
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#define LSYS_SUCCESS 0
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#define LSYS_ERR_BASE 0x80000000
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#define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE)
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// GPIO
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#define sys_gpio0 0xA0000000
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#define sys_gpio1 0xA0000004
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#define sys_led_port sys_gpio0
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#define sys_usb_ctrl sys_gpio1
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#define sys_timer_usec 0xA0000008
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#define sys_timer_sec 0xA000000C
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// TIMERs
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#define sys_itim_ctrl 0xA0000018
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#define sys_itim_stat 0xA000001C
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#define sys_itim0_cnt 0xA0000020
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#define sys_itim1_cnt 0xA0000024
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#define sys_itim2_cnt 0xA0000028
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#define sys_itim3_cnt 0xA000002C
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#define sys_itim0_cmp 0xA0000030
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#define sys_itim1_cmp 0xA0000034
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#define sys_itim2_cmp 0xA0000038
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#define sys_itim3_cmp 0xA000003C
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// UARTs
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#define sys_uart_bit_tx_halffull 0x00000001
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#define sys_uart_bit_tx_full 0x00000002
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#define sys_uart_bit_rx_halffull 0x00000004
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#define sys_uart_bit_rx_full 0x00000008
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#define sys_uart_bit_rx_avail 0x00000010
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#define sys_uart_bit_tx_inten 0x00000020
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#define sys_uart_bit_rx_inten 0x00000040
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#define sys_uart_bit_tx_irq 0x00000100
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#define sys_uart_bit_rx_irq 0x00000200
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#define sys_uart_data sys_uart0_data
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#define sys_uart_stat sys_uart0_stat
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#define sys_uart_baud sys_uart0_baud
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#define sys_uart0_data 0xA0010000
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#define sys_uart0_stat 0xA0010004
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#define sys_uart0_baud 0xA0010008
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#define sys_uart1_data 0xA0010100
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#define sys_uart1_stat 0xA0010104
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#define sys_uart1_baud 0xA0010108
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// PS2s
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#define sys_ps2_bit_tx_empty 0x00000001
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#define sys_ps2_bit_rx_avail 0x00000004
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#define sys_ps2_bit_tx_inten 0x00000020
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#define sys_ps2_bit_rx_inten 0x00000040
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#define sys_ps2_bit_tx_irq 0x00000100
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#define sys_ps2_bit_rx_irq 0x00000200
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#define sys_ps2_0_data 0xA0010200
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#define sys_ps2_0_stat 0xA0010204
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#define sys_ps2_1_data 0xA0010300
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#define sys_ps2_1_stat 0xA0010304
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// USB
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#define sys_usb_data 0xA0020000
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#define sys_usb_mbx 0xA0020004
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#define sys_usb_addr 0xA0020008
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#define sys_usb_status 0xA002000C
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// VGA
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#define sys_vga_ctrl 0xA0030000 // R/W
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#define sys_vga_bit_cgrdy 0x00000001 // RO
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#define sys_vga_bit_msten 0x00000002 // R/W
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#define sys_vga_bit_clrscr 0x00000010 // WO
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#define sys_vga_bit_clrline 0x00000020 // WO
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#define sys_vga_ascii 0xA0030004 // R/W
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#define sys_vga_posx 0xA0030008 // R/W
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#define sys_vga_posy 0xA003000C // R/W
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#define sys_vga_cgcol 0xA0030010 // R/W
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#define sys_vga_moffs 0xA0030014 // R/W
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#define sys_vga_resx 0xA0030018 // RO
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#define sys_vga_resy 0xA003001C // RO
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#define sys_vga_fps 0xA0030020 // RO
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// AC'97
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#define sys_ac97_stat 0xA0040000
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#define sys_ac97_ctrl 0xA0040000
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#define sys_ac97_acstat 0xA0040400
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#define sys_ac97_acctrl 0xA0040600
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#define sys_ac97_pcm 0xA0040800
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#define sys_ac97_wavin sys_ac97_pcm
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#define sys_ac97_wavout sys_ac97_pcm
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// Flash
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#define sys_flash_io 0xA4000000
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#define sys_flash_mem 0x00000000
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// Sync. SRAM
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#define sys_ssram_io 0xA8000000
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UINT32 CP0_SR_read(void);
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void CP0_SR_write(UINT32 val);
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UINT32 CP0_CR_read(void);
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void CP0_CR_write(UINT32 val);
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UINT32 CP0_PRID_read(void);
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UINT32 CP0_TR_read(void);
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void CP0_TR_write(UINT32 val);
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void CP0_TR_write_ptr(UINT32* pPtr);
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void CP0_TR_read_ptr(UINT32* pPtr);
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void ICACHE_invalidate_all(void);
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void ICACHE_invalidate_at(UINT32* pPtr);
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void DCACHE_invalidate_all(void);
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void DCACHE_invalidate_at(UINT32* pPtr);
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#define CALC_BAUD(b) \
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((UINT32)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1);
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#define UART0_setbaud(b) \
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*((UINT32*)sys_uart0_baud) = CALC_BAUD(b);
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#define UART1_setbaud(b) \
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*((UINT32*)sys_uart1_baud) = CALC_BAUD(b);
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#define UART2_setbaud(b) \
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*((UINT32*)sys_uart2_baud) = CALC_BAUD(b);
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char readchar(UINT32 port);
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void writechar(UINT32 port, char c);
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int write(int file, char *ptr, int len);
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int sputs(char *pStr);
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void print_byte(char byte);
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void print_word(int word);
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void _exit (int exitcode);
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void sleep(unsigned ms);
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void PrintBuffer8(UINT8 *pBuf, int nbpr, int len);
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void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len);
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void clr_screen(void);
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#endif // LIBSYS_H
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