52 lines
2.6 KiB
Plaintext
52 lines
2.6 KiB
Plaintext
onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -format Logic /tb_mips_top/rst
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Logic /tb_mips_top/cpu_halt
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/irom_data
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/irom_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dmem_addr
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dmem_din
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dmem_dout
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add wave -noupdate -format Logic /tb_mips_top/dmem_re
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add wave -noupdate -format Logic /tb_mips_top/dmem_we
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/inst_ram/sram
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add wave -noupdate -divider ALU
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add wave -noupdate -format Literal /tb_mips_top/uut/inst_pipeline/hdu
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -divider PC
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/pc
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/exception
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Logic /tb_mips_top/uut/inst_pipeline/stall
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add wave -noupdate -divider PC
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/uut/inst_pipeline/if_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/id_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dmem_din
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/ex_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/mem_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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add wave -noupdate -format Literal -radix hexadecimal /tb_mips_top/dmem_din
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add wave -noupdate -format Literal -radix hexadecimal -expand /tb_mips_top/uut/inst_pipeline/wb_stage
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add wave -noupdate -format Logic /tb_mips_top/clk
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 1} {0 ps} 0}
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configure wave -namecolwidth 188
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configure wave -valuecolwidth 100
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configure wave -justifyvalue left
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configure wave -signalnamewidth 1
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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configure wave -gridoffset 0
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configure wave -gridperiod 100
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configure wave -griddelta 40
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configure wave -timeline 1
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update
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WaveRestoreZoom {0 ps} {42 us}
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