jens d8083946f3 - changed NMI/RST behavior: reset exception entered after NMI/RST transition 1 => 0. ...

- BEV = 1 after NMI/RST (like hard reset)
- status not KUc,IEc not saved to KUp, IEp at NMI/RST (like hard reset)
Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@523 cc03376c-175c-47c8-b038-4cd826a8556b

2009-10-17 17:19:41 +00:00

..

JCpu

- removed interrupt polarity capabilty

2009-02-28 13:17:32 +00:00

MIPS

- changed NMI/RST behavior: reset exception entered after NMI/RST transition 1 => 0.

2009-10-17 17:19:41 +00:00