jens
70e48af3ab
git-svn-id: http://moon:8086/svn/vhdl/trunk@1036 cc03376c-175c-47c8-b038-4cd826a8556b
109 lines
3.8 KiB
VHDL
109 lines
3.8 KiB
VHDL
---- $Id: PCK_FIO_1993.vhd,v 1.1 2008/08/23 08:20:28 Jens Exp $
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----
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---- PCK_FIO: a VHDL package for C-style formatted file output
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---- Copyright (C) 1995, 2001 Easics NV
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----
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---- This library is free software; you can redistribute it and/or
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---- modify it under the terms of the GNU Lesser General Public
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---- License as published by the Free Software Foundation; either
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---- version 2.1 of the License, or (at your option) any later version.
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----
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---- This library is distributed in the hope that it will be useful,
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---- but WITHOUT ANY WARRANTY; without even the implied warranty of
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---- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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---- Lesser General Public License for more details.
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----
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---- You should have received a copy of the GNU Lesser General Public
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---- License along with this library; if not, write to the Free Software
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---- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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----
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---- For suggestions, bug reports, enhancement requests, and info about
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---- our design services, you can contact us at the following address:
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---- http://www.easics.com
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---- Easics NV, Interleuvenlaan 86, B-3001 Leuven, Belgium
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---- tel.: +32 16 395 600 fax : +32 16 395 619
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---- e-mail: jand@easics.be (Jan Decaluwe)
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----
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use STD.TEXTIO.all;
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library IEEE;
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use IEEE.std_logic_1164.all;
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-- signed/unsigned definition: use either std_logic_arith or numeric_std
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-- use IEEE.std_logic_arith.all; -- the Synopsys one
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use IEEE.numeric_std.all;
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package PCK_FIO is
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-- prefix string for hex output
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-- VHDL style: "X"""
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-- Verilog style: "h'"
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-- C style: "0x"
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constant FIO_h_PRE: string := "0x";
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-- postfix string for hex output
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-- VHDL style: """"
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constant FIO_h_POST: string := "";
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-- prefix string for bit vector output
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-- VHDL style: "B"""
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-- Verilog style: "b'"
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constant FIO_bv_PRE: string := "";
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-- postfix string for bit vector output
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-- VHDL style: """"
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constant FIO_bv_POST: string := "";
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-- prefix string for bit output
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-- VHDL style: "'"
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-- Verilog style: "b'"
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constant FIO_b_PRE: string := "";
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-- postfix string for bit output
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-- VHDL style: "'"
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constant FIO_b_POST: string := "";
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-- digit width for the string representation of integers
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constant FIO_d_WIDTH: integer := 10;
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-- bit width for the string representation of integers
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constant FIO_b_WIDTH: integer := 32;
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-- definition of the NIL string (default value for fprint arguments)
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-- fprint stops consuming arguments at the first NIL argument
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constant FIO_NIL: string := "\";
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procedure fprint
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(file F: text;
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L: inout line;
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Format: in string;
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A1 , A2 , A3 , A4 , A5 , A6 , A7 , A8 : in string := FIO_NIL;
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A9 , A10, A11, A12, A13, A14, A15, A16: in string := FIO_NIL;
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A17, A18, A19, A20, A21, A22, A23, A24: in string := FIO_NIL;
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A25, A26, A27, A28, A29, A30, A31, A32: in string := FIO_NIL
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);
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function fo (Arg: unsigned) return string;
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function fo (Arg: signed) return string;
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function fo (Arg: std_logic_vector) return string;
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function fo (Arg: std_ulogic_vector) return string;
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function fo (Arg: bit_vector) return string;
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function fo (Arg: integer) return string;
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function fo (Arg: std_ulogic) return string;
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function fo (Arg: bit) return string;
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function fo (Arg: boolean) return string;
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function fo (Arg: character) return string;
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function fo (Arg: string) return string;
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function fo (Arg: time) return string;
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procedure FIO_FormatExpand (FMT: inout line;
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Format: in string;
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StartPointer: in positive);
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end PCK_FIO;
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