17 lines
361 B
Makefile
17 lines
361 B
Makefile
include $(VHDL_HOME)/make/defs.mk
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MOD_PATH := $(LIB_PATH)/JBUS/memory
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SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
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SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r1c_ra.vhd
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SRCS += $(MOD_PATH)/src/ram_wb.vhd
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SRCS += $(MOD_PATH)/src/tb_ram_wb.vhd
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# Compile
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TARGET := tb_ram_wb
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ENTITY := tb_ram_wb
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RUN_TIME := 1500ns
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WAVE_FORMAT := vcd
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include $(VHDL_HOME)/make/ghdl.mk
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