jens
79de05d54c
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451 lines
8.5 KiB
C
451 lines
8.5 KiB
C
/* ------------------------------------------------------------------ */
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/* | Copyright Unpublished, MIPS Computer Systems, Inc. All Rights | */
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/* | Reserved. This software contains proprietary and confidential | */
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/* | information of MIPS and its suppliers. Use, disclosure or | */
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/* | reproduction is prohibited without the prior express written | */
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/* | consent of MIPS. | */
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/* ------------------------------------------------------------------ */
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/* inst.h 4.2 */
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/*
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* inst.h -- instruction format defines
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*/
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/**
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** UPDATE - 19 Sept 89 by Michael Smith
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**
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** Removed signed type to remove obnoxious C++ warning message.
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**/
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#ifdef LANGUAGE_C
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#ifdef MIPSEB
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union mips_instruction {
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unsigned word;
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unsigned char byte[4];
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struct {
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unsigned opcode : 6;
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unsigned target : 26;
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} j_format;
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struct {
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unsigned opcode : 6;
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unsigned rs : 5;
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unsigned rt : 5;
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unsigned simmediate : 16;
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} i_format;
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struct {
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unsigned opcode : 6;
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unsigned rs : 5;
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unsigned rt : 5;
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unsigned uimmediate : 16;
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} u_format;
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struct {
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unsigned opcode : 6;
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unsigned rs : 5;
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unsigned rt : 5;
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unsigned rd : 5;
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unsigned re : 5;
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unsigned func : 6;
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} r_format;
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struct {
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unsigned opcode : 6;
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unsigned : 1;
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unsigned fmt : 4;
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unsigned rt : 5;
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unsigned rd : 5;
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unsigned re : 5;
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unsigned func : 6;
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} f_format;
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};
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#endif
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#ifdef MIPSEL
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union mips_instruction {
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unsigned word;
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unsigned char byte[4];
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struct {
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unsigned target : 26;
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unsigned opcode : 6;
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} j_format;
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struct {
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unsigned simmediate : 16;
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unsigned rt : 5;
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unsigned rs : 5;
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unsigned opcode : 6;
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} i_format;
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struct {
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unsigned uimmediate : 16;
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unsigned rt : 5;
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unsigned rs : 5;
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unsigned opcode : 6;
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} u_format;
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struct {
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unsigned func : 6;
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unsigned re : 5;
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unsigned rd : 5;
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unsigned rt : 5;
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unsigned rs : 5;
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unsigned opcode : 6;
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} r_format;
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struct {
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unsigned func : 6;
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unsigned re : 5;
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unsigned rd : 5;
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unsigned rt : 5;
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unsigned fmt : 4;
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unsigned : 1;
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unsigned opcode : 6;
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} f_format;
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};
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#endif
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#define spec_op 0x00
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#define bcond_op 0x01
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#define j_op 0x02
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#define jal_op 0x03
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#define beq_op 0x04
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#define bne_op 0x05
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#define blez_op 0x06
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#define bgtz_op 0x07
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#define addi_op 0x08
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#define addiu_op 0x09
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#define slti_op 0x0A
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#define sltiu_op 0x0B
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#define andi_op 0x0C
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#define ori_op 0x0D
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#define xori_op 0x0E
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#define lui_op 0x0F
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#define lb_op 0x20
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#define lh_op 0x21
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#define lw_op 0x23
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#define lbu_op 0x24
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#define lhu_op 0x25
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#define ld_op 0x27
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#define sb_op 0x28
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#define sh_op 0x29
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#define sw_op 0x2B
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#define sd_op 0x2F
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#define lwl_op 0x22
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#define lwr_op 0x26
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#define swl_op 0x2a
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#define swr_op 0x2e
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/* Co-processor sub-opcodes */
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#define bc_op 0x08
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#define mfc_op 0x00
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#define cfc_op 0x02
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#define mtc_op 0x04
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#define ctc_op 0x06
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/* Co-processor 0 opcodes */
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#define cop0_op 0x10
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#define lwc0_op 0x30
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#define ldc0_op 0x34
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#define swc0_op 0x38
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#define sdc0_op 0x3c
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/* Co-processor 0 sub-opcodes */
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#define tlbr_op 0x1
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#define tlbwi_op 0x2
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#define tlbwr_op 0x6
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#define tlbp_op 0x8
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#define rfe_op 0x10
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/* Co-processor 1 opcodes */
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#define cop1_op 0x11
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#define lwc1_op 0x31
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#define ldc1_op 0x35
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#define swc1_op 0x39
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#define sdc1_op 0x3D
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/* Co-processor 1 sub-opcodes */
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#define fadd_op 0x00
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#define fsub_op 0x01
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#define fmpy_op 0x02
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#define fdiv_op 0x03
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#define fsqrt_op 0x04
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#define fabs_op 0x05
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#define fmov_op 0x06
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#define fneg_op 0x07
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#define fcvts_op 0x20
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#define fcvtd_op 0x21
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#define fcvte_op 0x22
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#define fcvtw_op 0x24
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#define fcmp_op 0x30
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#define s_fmt 0
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#define d_fmt 1
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#define e_fmt 2
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#define w_fmt 4
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/* Other coprocessor opcodes */
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#define cop2_op 0x12
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#define lwc2_op 0x32
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#define ldc2_op 0x36
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#define swc2_op 0x3a
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#define sdc2_op 0x3e
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#define cop3_op 0x13
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#define lwc3_op 0x33
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#define ldc3_op 0x37
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#define swc3_op 0x3b
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#define sdc3_op 0x3f
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/* bcond subopcodes */
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#define bltz_op 0x00
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#define bgez_op 0x01
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#define bltzal_op 0x10
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#define bgezal_op 0x11
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/* special subopcodes */
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#define sll_op 0x00
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#define srl_op 0x02
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#define sra_op 0x03
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#define sllv_op 0x04
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#define srlv_op 0x06
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#define srav_op 0x07
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#define jr_op 0x08
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#define jalr_op 0x09
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#define syscall_op 0x0C
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#define break_op 0x0D
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#define vcall_op 0x0E
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#define mfhi_op 0x10
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#define mthi_op 0x11
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#define mflo_op 0x12
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#define mtlo_op 0x13
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#define mult_op 0x18
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#define multu_op 0x19
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#define div_op 0x1A
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#define divu_op 0x1B
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#define add_op 0x20
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#define addu_op 0x21
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#define and_op 0x24
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#define or_op 0x25
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#define xor_op 0x26
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#define nor_op 0x27
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#define sub_op 0x22
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#define subu_op 0x23
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#define slt_op 0x2A
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#define sltu_op 0x2B
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#endif /* LANGUAGE_C */
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#ifdef LANGUAGE_PASCAL
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#ifdef MIPSEB
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type
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mips_instruction =
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packed record
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case cardinal of
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0: (
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word: cardinal;
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);
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1: (
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byte: packed array[0..3] of 0..255;
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);
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2: (
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opcode: 0..63;
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target: 0..67108863;
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);
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3: (
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opcode3: 0..63;
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rs: 0..31;
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rt: 0..31;
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simmediate: -32768..32767;
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);
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4: (
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opcode4: 0..63;
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rs4: 0..63;
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rt4: 0..63;
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uimmediate: 0..65535;
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);
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5: (
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opcode5: 0..63;
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rs5: 0..63;
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rt5: 0..63;
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rd5: 0..63;
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re5: 0..63;
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func: 0..63;
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);
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end {record};
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#endif
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#ifdef MIPSEL
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type
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mips_instruction =
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packed record
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case cardinal of
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0: (
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word: cardinal;
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);
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1: (
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byte: packed array[0..3] of 0..255;
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);
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2: (
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target: 0..67108863;
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opcode: 0..63;
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);
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3: (
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simmediate: -32768..32767;
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rt: 0..31;
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rs: 0..31;
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opcode3: 0..63;
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);
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4: (
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uimmediate: 0..65535;
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rt4: 0..63;
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rs4: 0..63;
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opcode4: 0..63;
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);
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5: (
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func: 0..63;
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re5: 0..63;
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rd5: 0..63;
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rt5: 0..63;
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rs5: 0..63;
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opcode5: 0..63;
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);
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end {record};
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#endif
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#define spec_op 16#00
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#define bcond_op 16#01
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#define j_op 16#02
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#define jal_op 16#03
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#define beq_op 16#04
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#define bne_op 16#05
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#define blez_op 16#06
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#define bgtz_op 16#07
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#define addi_op 16#08
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#define addiu_op 16#09
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#define slti_op 16#0A
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#define sltiu_op 16#0B
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#define andi_op 16#0C
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#define ori_op 16#0D
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#define xori_op 16#0E
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#define lui_op 16#0F
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#define lb_op 16#20
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#define lh_op 16#21
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#define lw_op 16#23
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#define lbu_op 16#24
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#define lhu_op 16#25
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#define ld_op 16#27
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#define sb_op 16#28
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#define sh_op 16#29
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#define sw_op 16#2B
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#define sd_op 16#2F
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#define lwl_op 16#22
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#define lwr_op 16#26
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#define swl_op 16#2a
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#define swr_op 16#2e
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/* Co-processor sub-opcodes */
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#define bc_op 16#08
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#define mfc_op 16#00
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#define cfc_op 16#02
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#define mtc_op 16#04
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#define ctc_op 16#06
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/* Co-processor 0 opcodes */
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#define cop0_op 16#10
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#define lwc0_op 16#30
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#define ldc0_op 16#34
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#define swc0_op 16#38
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#define sdc0_op 16#3c
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/* Co-processor 0 sub-opcodes */
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#define tlbr_op 16#1
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#define tlbwi_op 16#2
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#define tlbwr_op 16#6
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#define tlbp_op 16#8
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#define rfe_op 16#10
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/* Co-processor 1 opcodes */
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#define cop1_op 16#11
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#define lwc1_op 16#31
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#define ldc1_op 16#35
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#define swc1_op 16#39
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#define sdc1_op 16#3D
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/* Co-processor 1 sub-opcodes */
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#define fadd_op 16#00
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#define fsub_op 16#01
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#define fmpy_op 16#02
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#define fdiv_op 16#03
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#define fsqrt_op 16#04
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#define fabs_op 16#05
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#define fmov_op 16#06
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#define fneg_op 16#07
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#define fcvts_op 16#20
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#define fcvtd_op 16#21
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#define fcvte_op 16#22
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#define fcvtw_op 16#24
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#define fcmp_op 16#30
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#define s_fmt 0
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#define d_fmt 1
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#define e_fmt 2
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#define w_fmt 4
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/* Other coprocessor opcodes */
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#define cop2_op 16#12
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#define lwc2_op 16#32
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#define ldc2_op 16#36
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#define swc2_op 16#3a
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#define sdc2_op 16#3e
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#define cop3_op 16#13
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#define lwc3_op 16#33
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#define ldc3_op 16#37
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#define swc3_op 16#3b
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#define sdc3_op 16#3f
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/* bcond subopcodes */
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#define bltz_op 16#00
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#define bgez_op 16#01
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#define bltzal_op 16#10
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#define bgezal_op 16#11
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/* special subopcodes */
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#define sll_op 16#00
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#define srl_op 16#02
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#define sra_op 16#03
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#define sllv_op 16#04
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#define srlv_op 16#06
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#define srav_op 16#07
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#define jr_op 16#08
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#define jalr_op 16#09
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#define syscall_op 16#0C
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#define break_op 16#0D
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#define vcall_op 16#0E
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#define mfhi_op 16#10
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#define mthi_op 16#11
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#define mflo_op 16#12
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#define mtlo_op 16#13
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#define mult_op 16#18
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#define multu_op 16#19
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#define div_op 16#1A
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#define divu_op 16#1B
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#define add_op 16#20
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#define addu_op 16#21
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#define and_op 16#24
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#define or_op 16#25
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#define xor_op 16#26
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#define nor_op 16#27
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#define sub_op 16#22
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#define subu_op 16#23
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#define slt_op 16#2A
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#define sltu_op 16#2B
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#endif /* LANGUAGE_PASCAL */
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