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vhdl/lib/CPUs/MIPS/src/async_defs.vhd
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jens 592c158275 Initial version
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git-svn-id: http://moon:8086/svn/vhdl/trunk@265 cc03376c-175c-47c8-b038-4cd826a8556b
2009-01-18 22:25:52 +00:00

61 lines
1.6 KiB
VHDL

-------------------------------------------------------------------------
-- Project: MIPS System controller
-- This file:
--
-- Copyright (C) 2008 J. Ahrensfeld
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program. If not, see <http://www.gnu.org/licenses/>.
--
-- For questions and ideas, please contact the author at jens@jayfield.org
--
--------------------------------------------------------------------------
library IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;
use work.async_types.all;
package async_defs is
constant ts_flash : async_timespec_t :=
(
ncyc_access => 1,
ncyc_pulse_rd => 12,
ncyc_pulse_wr => 7,
ncyc_cs_hold => 1,
ncyc_release => 1,
ncyc_pulse_rst => 8,
pol_cs => '0',
pol_oe => '0',
pol_we => '0',
pol_rst => '0'
);
constant ts_sram : async_timespec_t :=
(
ncyc_access => 1,
ncyc_pulse_rd => 12,
ncyc_pulse_wr => 7,
ncyc_cs_hold => 1,
ncyc_release => 1,
ncyc_pulse_rst => 8,
pol_cs => '0',
pol_oe => '0',
pol_we => '0',
pol_rst => '0'
);
end async_defs;