Files
vhdl/lib/CPUs/MIPS/ghdl/tb_mips_top.make
T
jens 1a346c73d9 - fixed paths after refactoring
git-svn-id: http://moon:8086/svn/vhdl/trunk@1533 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-24 20:18:09 +00:00

42 lines
964 B
Makefile

include mips_core.inc
include ../../../../lib/FIFO/ghdl/fifo_sync.inc
include ../../../../lib/FIFO/ghdl/fifo_async.inc
# FIFOS
SRCS += $(FIFO_SYNC_SRCS)
SRCS += $(FIFO_ASYNC_SRCS)
# UART
SRCS += ../../../uart/src/uart_types.vhd
SRCS += ../../../uart/src/sim/uart.vhd
SRCS += ../../../uart/src/uart_wb.vhd
# GPIO
SRCS += ../../../JBUS/gpio/src/gpio_wb.vhd
# Async port
SRCS += ../../../JBUS/async_port/src/async_types.vhd
SRCS += ../../../JBUS/async_port/src/async_port_wb.vhd
SRCS += ../src/async_defs.vhd
# ROM
#SRCS += Z:/work/repos/mips/src/bootloader/build/ml402/eb/bootloader.elf.ROM.vhd
#SRCS += Z:/work/repos/mips/src/bootloader/build/denano/eb/bootloader.elf.ROM.vhd
SRCS += ../src/bootloader_flash.ROM.vhd
SRCS += ../../../JBUS/memory/src/rom_wb.vhd
# MIPS
SRCS += $(MIPS_CORE_SRCS)
# TB
SRCS += ../src/tb_mips_top.vhd
# Compile
TARGET := tb_mips_top
ENTITY = tb_mips_top
RUN_TIME := 1500us
WITH_VCD := y
include ../../../../Common/make/ghdl.mk