jens 9360547eab - FIFO: control extra read register using generic "add_extra_read_register". Default = false ...

git-svn-id: http://moon:8086/svn/vhdl/trunk@1614 cc03376c-175c-47c8-b038-4cd826a8556b

2021-03-31 10:18:26 +00:00

..

ghdl

- added read register stage to fifo

2021-03-31 09:37:17 +00:00

sim

- delete work

2015-05-17 06:15:15 +00:00

src

- FIFO: control extra read register using generic "add_extra_read_register". Default = false

2021-03-31 10:18:26 +00:00