jens
5ffd02c06e
- background is black per default git-svn-id: http://moon:8086/svn/vhdl/trunk@1592 cc03376c-175c-47c8-b038-4cd826a8556b
30 lines
1.6 KiB
Plaintext
30 lines
1.6 KiB
Plaintext
vhdl work "../../../../lib/rams/xilinx/src/dpram_1w1r2c_ro.vhd"
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vhdl work "../../../../lib/misc/utils_pkg.vhd"
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vhdl work "../../../../lib/VGA_ctrl/src/fonts/char_rom_fixedsys_8x16.vhd"
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vhdl work "../../../../lib/VGA_ctrl/src/vga_types.vhd"
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vhdl work "../../../../lib/VGA_ctrl/src/char_gen.vhd"
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vhdl work "../../../../lib/VGA_ctrl/src/vga_sync.vhd"
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vhdl work "../../../../lib/VGA_ctrl/src/vga_timing.vhd"
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vhdl work "../../../../lib/VGA_ctrl/src/vga_backend.vhd"
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vhdl work "../../../../lib/rams/xilinx/src/dpram_1w1r2c_ra.vhd"
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vhdl work "../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd"
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vhdl work "../../../../lib/FIFO/src/gray_counter.vhd"
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vhdl work "../../../../lib/FIFO/src/fifo_async_ctrl.vhd"
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vhdl work "../../../../lib/FIFO/src/fifo_async.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/cpu.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/alu.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/chipram.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/chipreg.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/dpath_ctrl.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/int_ctrl.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/pc.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/reg_dual.vhd"
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vhdl work "../../../../lib/CPUs/JCpu/src/core/stack_ctrl.vhd"
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vhdl work "../../../../lib/clock/xilinx/src/clockgen.vhd"
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vhdl work "../../src/main_xrom.vhdl"
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vhdl work "../../src/main_irom.vhdl"
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vhdl work "../../src/cpu_embedded.vhd"
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vhdl work "../../src/vga_ctrl_top.vhd"
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vhdl work "../../src/vga_ctrl_sys.vhd"
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