Files
vhdl/lib/JBUS/memory/ghdl/tb_rom_wb.make
T
jens 599726a7b2 - refactored
git-svn-id: http://moon:8086/svn/vhdl/trunk@1531 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-24 18:39:05 +00:00

18 lines
339 B
Makefile

ROOT_PATH := ../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS
SRCS += $(MOD_PATH)/src/memory/rom_sim.vhd
SRCS += $(MOD_PATH)/src/memory/rom_wb.vhd
SRCS += $(MOD_PATH)/src/memory/tb_rom_wb.vhd
# Compile
TARGET := tb_rom_wb
ENTITY := tb_rom_wb
WITH_VCD := y
RUN_TIME := 1500ns
include $(ROOT_PATH)/Common/make/ghdl.mk