jens
a356c98ef3
Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@697 cc03376c-175c-47c8-b038-4cd826a8556b
188 lines
5.9 KiB
C
188 lines
5.9 KiB
C
#ifndef LIBSYS_H
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#define LIBSYS_H
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// ---------------------------------------------------------
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// Types
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// ---------------------------------------------------------
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#define INT8 signed char
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#define INT16 signed short
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#define INT32 signed int
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#define INT64 signed long long
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#define UINT8 unsigned char
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#define UINT16 unsigned short
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#define UINT32 unsigned int
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#define UINT64 unsigned long long
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#define INT INT32
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#define UINT UINT32
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#define FLOAT32 float
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#define FLOAT64 double
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#define NO_ERROR LSYS_SUCCESS
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#define ERROR LSYS_ERR_BASE
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#define LSYS_SUCCESS 0
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#define LSYS_ERR_BASE 0x80000000
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#define IS_ERROR(e) ((e & LSYS_ERR_BASE) == LSYS_ERR_BASE)
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// GPIO
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#define SYS_GPIO0 0xA0000000
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#define SYS_GPIO1 0xA0000004
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#define SYS_LED_PORT SYS_GPIO0
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#define SYS_USB_CTRL SYS_GPIO1
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#define SYS_TIMER_USEC 0xA0000008
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#define SYS_TIMER_SEC 0xA000000C
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// TIMERs
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#define SYS_ITIM_CTRL 0xA0000018
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#define SYS_ITIM_STAT 0xA000001C
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#define SYS_ITIM0_CNT 0xA0000020
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#define SYS_ITIM1_CNT 0xA0000024
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#define SYS_ITIM2_CNT 0xA0000028
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#define SYS_ITIM3_CNT 0xA000002C
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#define SYS_ITIM0_CMP 0xA0000030
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#define SYS_ITIM1_CMP 0xA0000034
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#define SYS_ITIM2_CMP 0xA0000038
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#define SYS_ITIM3_CMP 0xA000003C
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// UARTs
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#define SYS_UART_BIT_TX_HALFFULL 0x00000001
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#define SYS_UART_BIT_TX_FULL 0x00000002
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#define SYS_UART_BIT_RX_HALFFULL 0x00000004
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#define SYS_UART_BIT_RX_FULL 0x00000008
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#define SYS_UART_BIT_RX_AVAIL 0x00000010
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#define SYS_UART_BIT_TX_INTEN 0x00000020
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#define SYS_UART_BIT_RX_INTEN 0x00000040
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#define SYS_UART_BIT_TX_IRQ 0x00000100
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#define SYS_UART_BIT_RX_IRQ 0x00000200
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#define SYS_UART_DATA SYS_UART0_DATA
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#define SYS_UART_STAT SYS_UART0_STAT
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#define SYS_UART_BAUD SYS_UART0_BAUD
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#define SYS_UART0_DATA 0xA0010000
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#define SYS_UART0_STAT 0xA0010004
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#define SYS_UART0_BAUD 0xA0010008
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#define SYS_UART1_DATA 0xA0010100
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#define SYS_UART1_STAT 0xA0010104
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#define SYS_UART1_BAUD 0xA0010108
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// PS2s
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#define SYS_PS2_BIT_TX_EMPTY 0x00000001
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#define SYS_PS2_BIT_RX_AVAIL 0x00000004
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#define SYS_PS2_BIT_PIN_CLOCK 0x00000008
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#define SYS_PS2_BIT_PIN_DATA 0x00000010
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#define SYS_PS2_BIT_TX_INTEN 0x00000020
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#define SYS_PS2_BIT_RX_INTEN 0x00000040
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#define SYS_PS2_BIT_TX_IRQ 0x00000100
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#define SYS_PS2_BIT_RX_IRQ 0x00000200
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#define SYS_PS2_BIT_RX_ERR_PAR 0x00000800
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#define SYS_PS2_BIT_RX_ERR_FLAG 0x00008000
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#define SYS_PS2_0_DATA 0xA0010200
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#define SYS_PS2_0_STAT 0xA0010204
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#define SYS_PS2_1_DATA 0xA0010300
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#define SYS_PS2_1_STAT 0xA0010304
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// USB
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#define SYS_USB_DATA 0xA0020000
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#define SYS_USB_MBX 0xA0020004
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#define SYS_USB_ADDR 0xA0020008
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#define SYS_USB_STATUS 0xA002000C
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// VGA
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#define SYS_VGA_CTRL 0xA0030000 // R/W
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#define SYS_VGA_BIT_CGRDY 0x00000001 // RO
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#define SYS_VGA_BIT_MSTEN 0x00000002 // R/W
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#define SYS_VGA_BIT_BUFCHG_INTEN 0x00000004 // RO
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#define SYS_VGA_BIT_BUFCHG_FLAG 0x00000008 // RO
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#define SYS_VGA_BIT_CLRSCR 0x00000010 // WO
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#define SYS_VGA_BIT_CLRLINE 0x00000020 // WO
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#define SYS_VGA_BIT_BLIT_REQ 0x00000100 // R/W
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#define SYS_VGA_BIT_BLIT_BSY 0x00000100 // R/W
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#define SYS_VGA_BIT_BLIT_FIN 0x00000200 // R/W
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#define SYS_VGA_BIT_BLIT_ACK 0x00000200 // R/W
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#define SYS_VGA_BIT_BLIT_FIN_INTEN 0x00000400 // R/W
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#define SYS_VGA_ASCII 0xA0030004 // R/W
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#define SYS_VGA_POSX 0xA0030008 // R/W
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#define SYS_VGA_POSY 0xA003000C // R/W
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#define SYS_VGA_CGCOL 0xA0030010 // R/W
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#define SYS_VGA_RES 0xA0030014 // RO
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#define SYS_VGA_FB_FRONT 0xA0030018 // R/W
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#define SYS_VGA_FB_BACK 0xA003001C // R/W
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#define SYS_VGA_BLIT_SRC0 SYS_VGA_BLIT_SRC0_FIRST // R/W
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#define SYS_VGA_BLIT_SRC0_FIRST 0xA0030020 // R/W
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#define SYS_VGA_BLIT_SRC0_LAST 0xA0030024 // R/W
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#define SYS_VGA_BLIT_SRC0_DIMX 0xA0030028 // R/W
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#define SYS_VGA_BLIT_DST SYS_VGA_BLIT_DST_FIRST // R/W
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#define SYS_VGA_BLIT_DST_FIRST 0xA0030050 // R/W
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#define SYS_VGA_BLIT_DST_LAST 0xA0030054 // R/W
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#define SYS_VGA_BLIT_DST_DIMX 0xA0030058 // R/W
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#define SYS_VGA_BLIT_NX 0xA0030060 // R/W
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#define SYS_VGA_BLIT_NY 0xA0030064 // R/W
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// AC'97
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#define SYS_AC97_STAT 0xA0040000
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#define SYS_AC97_CTRL 0xA0040000
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#define SYS_AC97_ACSTAT 0xA0040400
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#define SYS_AC97_ACCTRL 0xA0040600
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#define SYS_AC97_PCM 0xA0040800
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#define SYS_AC97_WAVIN SYS_AC97_PCM
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#define SYS_AC97_WAVOUT SYS_AC97_PCM
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// Flash
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#define SYS_FLASH_IO 0xA4000000
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#define SYS_FLASH_MEM 0x00000000
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// Sync. SRAM
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#define SYS_SSRAM_IO 0xA8000000
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UINT32 CP0_SR_read(void);
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void CP0_SR_write(UINT32 val);
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UINT32 CP0_CR_read(void);
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void CP0_CR_write(UINT32 val);
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UINT32 CP0_PRID_read(void);
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UINT32 CP0_TR_read(void);
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void CP0_TR_write(UINT32 val);
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void CP0_TR_write_ptr(UINT32* pPtr);
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void CP0_TR_read_ptr(UINT32* pPtr);
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void ICACHE_invalidate_all(void);
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void ICACHE_invalidate_at(UINT32* pPtr);
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void DCACHE_invalidate_all(void);
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void DCACHE_invalidate_at(UINT32* pPtr);
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#define CALC_BAUD(b) \
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((UINT32)((float)CPU_FREQ_HZ/(16*b) + 0.5f) - 1);
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#define UART0_setbaud(b) \
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*((UINT32*)SYS_UART0_BAUD) = CALC_BAUD(b);
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#define UART1_setbaud(b) \
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*((UINT32*)SYS_UART1_BAUD) = CALC_BAUD(b);
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#define UART2_setbaud(b) \
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*((UINT32*)SYS_UART2_BAUD) = CALC_BAUD(b);
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char readchar(UINT32 port);
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void writechar(UINT32 port, char c);
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int write(int file, char *ptr, int len);
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int sputs(char *pStr);
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void print_byte(char byte);
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void print_word(int word);
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void _exit (int exitcode);
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void sleep(unsigned ms);
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char _getchar(void);
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void PrintBuffer8(UINT8 *pBuf, int nbpr, int len);
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void memdump(UINT8 *pBuf, int print_offset_only, int num_bytes_per_row, int len);
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void Screen_clr(void);
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void Screen_line_clr(void);
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void Screen_csr_set_x(UINT32 coord);
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void Screen_csr_set_y(UINT32 coord);
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UINT32 Screen_get_resx(void);
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UINT32 Screen_get_resy(void);
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UINT32 Screen_get_fps(void);
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#endif // LIBSYS_H
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