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36e8cd1e00b439b817193e325efb8f9c3a5cb7a7
vhdl
/
lib
/
SDRAM
/
ddr_sdr_v1_5
/
sim
T
History
jens
36e8cd1e00
- Using MODELSIM_HOME environment variable
...
git-svn-id:
http://moon:8086/svn/vhdl/trunk@98
cc03376c-175c-47c8-b038-4cd826a8556b
2008-10-23 21:21:24 +00:00
..
compile_simprim.do
Intital revision
2008-10-02 13:37:55 +00:00
compile_unisim.do
Intital revision
2008-10-02 13:37:55 +00:00
ModelSim SE .lnk
- Using MODELSIM_HOME environment variable
2008-10-23 21:21:24 +00:00
tb_sdram_ctrl_frontend_wb.fdo
- using now 64-bit SDR interface (2 SDRAMS)
2008-10-18 13:31:15 +00:00
tb_sdram_ctrl_frontend_wb.wdo
- using now 64-bit SDR interface (2 SDRAMS)
2008-10-18 13:31:15 +00:00
