jens 3419540ef7 [DE0-Nano] ...

- use PLL clock output for feed back

git-svn-id: http://moon:8086/svn/vhdl/trunk@1385 cc03376c-175c-47c8-b038-4cd826a8556b

2017-02-05 11:24:50 +00:00

..

JMips.cof

[DE0-Nano]

2017-01-12 16:33:32 +00:00

JMips.qpf

[mips_de0_nano]

2016-11-26 14:43:26 +00:00

JMips.qsf

[DE0-Nano]

2017-02-05 11:10:29 +00:00

JMips.sdc

[DE0-Nano]

2017-02-05 11:10:29 +00:00

jtag_test.tcl

[mips_de0_nano]

2016-11-26 14:43:26 +00:00

JTag-Test.lnk

[mips_de0_nano]

2016-11-26 14:43:26 +00:00

mips_sys.vhd

[DE0-Nano]

2017-02-05 11:24:50 +00:00

tb_mips_sys.vhd

[mips_de0_nano]

2016-11-26 14:43:26 +00:00

VJ-UART.lnk

[DE0-Nano]

2016-12-21 19:58:45 +00:00

vjuart.tcl

[mips_de0_nano]

2016-11-26 14:43:26 +00:00