Files
vhdl/projects/vga_ctrl/sim/compile_unisim.do
T
jens 0a2abde8bf - added
git-svn-id: http://moon:8086/svn/vhdl/trunk@1418 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-21 11:05:13 +00:00

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vlib unisim
vcom -93 -work unisim F:/Xilinx9/vhdl/src/unisims/unisim_vpkg.vhd
vcom -93 -work unisim F:/Xilinx9/vhdl/src/unisims/unisim_vcomp.vhd
vcom -93 -work unisim F:/Xilinx9/vhdl/src/unisims/unisim_smodel.vhd
vcom -93 -work unisim F:/Xilinx9/vhdl/src/unisims/unisim_vital.vhd