Files
vhdl/lib/fixed_ja/eval_fixed_ja.vhd
T
jens eafe4bf00d - added
git-svn-id: http://moon:8086/svn/vhdl/trunk@1329 cc03376c-175c-47c8-b038-4cd826a8556b
2015-10-25 09:50:25 +00:00

90 lines
2.1 KiB
VHDL

----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 00:28:57 07/10/2006
-- Design Name:
-- Module Name: adder_registered - Behavioral
-- Project Name:
-- Target Devices:
-- Tool versions:
-- Description:
--
-- Dependencies:
--
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
--
----------------------------------------------------------------------------------
library IEEE;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
use IEEE.MATH_REAL.ALL;
use std.textio.all; -- Imports the standard textio package.
library work;
use work.fixed_ja.all;
---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;
entity eval_fixed_ja is
Generic (
nbits : integer := 32;
nbits_int : integer := 2);
end eval_fixed_ja;
architecture Behavioral of eval_fixed_ja is
---------------------------------------------------------------------
type my_range is range 0 downto -10;
begin
process
constant c1 : ufixed_t (0 downto -10) := "11111111000";
constant c2 : ufixed_t := to_ufixed(3.141592654, nbits, 4);
constant c3 : ufixed_t := to_ufixed(1.0/3.141592654, nbits, 1);
variable t1 : ufixed_t (uproto(8,1)'range);
variable L : line;
variable slv : string (15 downto 1) := (others => '-');
constant jens : string (10 downto 7) := "JENS";
begin
-- slv := (1 => '1', 2 => 'J', jens'range => jens(jens'range), others => '1');
slv(jens'range) := "Jens";
slv(jens'range) := jens;
print_info(c2, "c2");
print_info(c3, "c3");
t1 := to_ufixed(c1, t1, round_to_zero, saturate);
print_info(c1, "c1");
print_info(t1, "t1");
t1 := to_ufixed(c1, t1, round_half_up, saturate);
print_info(c1, "c1");
print_info(t1, "t1");
print_info(to_ufixed(c2*c2, 32, 2, none, saturate), "c2*c2");
print_info(to_ufixed(c2*c3, 32, 0, round_half_up, none), "c2*c3");
write (L, slv);
writeline (output, L);
wait;
end process;
---------------------------------------------------------------------
end Behavioral;