36 lines
1.9 KiB
Plaintext
36 lines
1.9 KiB
Plaintext
vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_types.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_instr.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\sdram_config.vhd"
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vhdl work "W:\vhdl\lib\misc\utils_pkg.vhd"
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vhdl work "W:\vhdl\lib\FIFO\src\fifo_ctrl_pkg.vhd"
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vhdl work "W:\vhdl\lib\misc\dpram_1w2r.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_types.vhd"
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vhdl work "W:\vhdl\lib\FIFO\src\sync_fifo_ctrl.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_shifter.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_reg.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_muldiv.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_idecode_rom.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_cop.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bcu.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_alu.vhd"
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vhdl work "W:\vhdl\lib\uart\kcuart_tx.vhd"
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vhdl work "W:\vhdl\lib\uart\kcuart_rx.vhd"
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vhdl work "W:\vhdl\lib\uart\bbfifo_16x8.vhd"
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vhdl work "W:\vhdl\lib\misc\dpram_2w2r_virtex4.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_ctrl.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_cmd.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\reset_virtex4.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\fifo_sync.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\ddr_phy_virtex4.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\clockgen_virtex4.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_pipeline.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_bui.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\ram_ld.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\asm\bootloader\bootloader.ROM_ld.vhd"
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vhdl work "W:\vhdl\lib\uart\uart_tx.vhd"
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vhdl work "W:\vhdl\lib\uart\uart_rx.vhd"
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vhdl work "W:\vhdl\lib\misc\lcd_port.vhd"
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vhdl work "W:\vhdl\lib\SDRAM\ddr_sdr_v1_4\src\sdram_ctrl_top.vhd"
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vhdl work "W:\vhdl\lib\CPUs\MIPS\src\core\mips_top.vhd"
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vhdl work "W:\vhdl\projects\mips_sys\src\mips_sys.vhd"
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