Files
vhdl/lib/JBUS/memory/ghdl/tb_ram_wb.make
T
jens 1a346c73d9 - fixed paths after refactoring
git-svn-id: http://moon:8086/svn/vhdl/trunk@1533 cc03376c-175c-47c8-b038-4cd826a8556b
2021-03-24 20:18:09 +00:00

19 lines
384 B
Makefile

ROOT_PATH := ../../../..
LIB_PATH := $(ROOT_PATH)/lib
MOD_PATH := $(LIB_PATH)/JBUS/memory
SRCS += $(LIB_PATH)/misc/utils_pkg.vhd
SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r1c_ra.vhd
SRCS += $(MOD_PATH)/src/ram_wb.vhd
SRCS += $(MOD_PATH)/src/tb_ram_wb.vhd
# Compile
TARGET := tb_ram_wb
ENTITY := tb_ram_wb
WITH_VCD := y
RUN_TIME := 1500ns
include $(ROOT_PATH)/Common/make/ghdl.mk