jens
5309734167
git-svn-id: http://moon:8086/svn/vhdl/trunk@1422 cc03376c-175c-47c8-b038-4cd826a8556b
93 lines
3.0 KiB
Plaintext
93 lines
3.0 KiB
Plaintext
#
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# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
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# SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
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# XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
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# AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
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# OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
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# IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
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# AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
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# FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
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# WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
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# IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
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# REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
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# INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE.
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#
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# (c) Copyright 2005 Xilinx, Inc.
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# All rights reserved.
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#
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# Bus clock nets
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NET sys_clk_in TNM_NET = "sys_clk_in";
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TIMESPEC "TSSYSCLK" = PERIOD "sys_clk_in" 9.9 ns HIGH 50 %;
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NET sys_clk_in LOC = AE14;
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NET sys_clk_in IOSTANDARD = LVCMOS33;
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NET sys_rst_n_in LOC = D6;
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NET sys_rst_n_in PULLUP;
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NET sys_rst_n_in TIG;
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# GPLED 0-3
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NET led<0> LOC = G5; #GPLED0
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NET led<1> LOC = G6; #GPLED1
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NET led<2> LOC = A11; #GPLED2
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NET led<3> LOC = A12; #GPLED3
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NET "led<*>" SLEW = SLOW;
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NET "led<*>" DRIVE = 2;
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NET sys_rx LOC = W2;
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NET sys_rx IOSTANDARD = LVCMOS33;
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NET sys_rx TIG;
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NET sys_tx LOC = W1;
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NET sys_tx IOSTANDARD = LVCMOS33;
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NET sys_tx TIG;
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# Dip Switches 1-8
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#NET sys_test_in<0> LOC = U24; # DIP SW 8
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#NET sys_test_in<1> LOC = U25; # DIP SW 7
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#NET sys_test_in<2> LOC = V23; # DIP SW 6
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#NET sys_test_in<3> LOC = U23; # DIP SW 5
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#NET sys_test_in<4> LOC = U26; # DIP SW 4
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#NET sys_test_in<5> LOC = T26; # DIP SW 3
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#NET sys_test_in<6> LOC = R19; # DIP SW 2
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#NET sys_test_in<7> LOC = R20; # DIP SW 1
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#NET sys_test_in<0> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<1> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<2> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<3> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<4> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<5> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<6> IOSTANDARD = LVCMOS33;
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#NET sys_test_in<7> IOSTANDARD = LVCMOS33;
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#NET "sys_test_in<*>" PULLDOWN;
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#NET "sys_test_in<*>" TIG;
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#NET "sys_test_in<*>" SLEW = SLOW;
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#NET "sys_test_in<*>" DRIVE = 2;
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#------------------------------------------------------------------------------
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# IO Pad Location Constraints / Properties for PS/2 Ports
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#------------------------------------------------------------------------------
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#Keyboard
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#NET ps2_keyb_clk LOC = D2;
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#NET ps2_keyb_clk SLEW = SLOW;
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#NET ps2_keyb_clk DRIVE = 2;
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#NET ps2_keyb_clk TIG;
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#NET ps2_keyb_data LOC = G9;
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#NET ps2_keyb_data SLEW = SLOW;
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#NET ps2_keyb_data DRIVE = 2;
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#NET ps2_keyb_data TIG;
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#Mouse
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NET ps2_mouse_clk LOC = B14;
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NET ps2_mouse_clk SLEW = SLOW;
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NET ps2_mouse_clk DRIVE = 2;
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NET ps2_mouse_clk TIG;
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NET ps2_mouse_data LOC = C14;
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NET ps2_mouse_data SLEW = SLOW;
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NET ps2_mouse_data DRIVE = 2;
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NET ps2_mouse_data TIG;
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