Files
vhdl/lib/SDRAM
jens d908ae0e9e - SDRAM can now operate at different speed than BUS clock
- separated bus-clock (sys_clk) and SDRAM-clocks
  - added async. FIFOs for clock domain separation
Committed on the Free edition of March Hare Software CVSNT Server.
Upgrade to CVS Suite for more features and support:
http://march-hare.com/cvsnt/


git-svn-id: http://moon:8086/svn/vhdl/trunk@578 cc03376c-175c-47c8-b038-4cd826a8556b
2009-11-03 20:42:27 +00:00
..
2009-11-03 09:59:34 +00:00