jens 0afb7b1758 - added ...

git-svn-id: http://moon:8086/svn/vhdl/trunk@1097 cc03376c-175c-47c8-b038-4cd826a8556b

2015-05-16 17:41:08 +00:00

..

altera/libsrc

- added

2015-05-16 17:41:08 +00:00

compile_fixed.do

Initial revision

2013-04-27 10:53:09 +00:00

compile_simprim.do

get XILINX path from environment

2013-04-27 10:52:52 +00:00

compile_unisim.do

get XILINX path from environment

2013-04-27 10:52:52 +00:00

ModelSim SE .lnk

- use %VHDL_HOME%\

2014-07-23 20:34:10 +00:00

modelsim.ini

- added

2014-07-23 20:34:41 +00:00