------------------------------------------------------------------------- -- Project: JCPU, a portable 8-bit RISC CPU written in VHDL -- This file: The ROM file for use in your VHDL design -- -- Copyright (C) 2007 J. Ahrensfeld -- -- This program is free software: you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation, either version 3 of the License, or -- (at your option) any later version. -- -- This program is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- -- You should have received a copy of the GNU General Public License -- along with this program. If not, see . -- -- For questions and ideas, please contact the author at jens@jayfield.org -- -------------------------------------------------------------------------- LIBRARY ieee; use IEEE.STD_LOGIC_1164.ALL; USE ieee.numeric_std.ALL; library work; use work.cpu_pkg.all; -- JASM_ROM_INSERT_HERE ENTITY irom IS Port ( clk : in STD_LOGIC; ce : in STD_LOGIC; addr : in inst_addr_t; dout : out inst_t ); END irom; ARCHITECTURE sdr_test_short OF irom IS type imem_rom_t is array (0 to 110) of inst_t; -- Assembled from sdr_test_short.jsm constant imem_rom : imem_rom_t := ( "110000" & X"002", -- 0x000: JMP 0x002 "111111" & X"000", -- 0x001: RETI "000011" & X"000", -- 0x002: MOV R00, 0x00 "100100" & X"010", -- 0x003: XOUT (0x01), R00 "101000" & X"040", -- 0x004: XIN R00, (0x04) "011001" & X"CF0", -- 0x005: AND R00, 0xCF "100100" & X"040", -- 0x006: XOUT (0x04), R00 "101000" & X"070", -- 0x007: XIN R00, (0x07) "011001" & X"800", -- 0x008: AND R00, 0x80 "110010" & X"007", -- 0x009: JNZ 0x007 "110000" & X"00B", -- 0x00A: JMP 0x00B "111011" & X"058", -- 0x00B: CALL 0x058 "000011" & X"800", -- 0x00C: MOV R00, 0x80 "000011" & X"08F", -- 0x00D: MOV R15, 0x08 "000111" & X"000", -- 0x00E: MOVX (R00), 0x00 "010001" & X"010", -- 0x00F: INC R00 "010101" & X"01F", -- 0x010: DEC R15 "110010" & X"00E", -- 0x011: JNZ 0x00E "101000" & X"080", -- 0x012: XIN R00, (0x08) "001111" & X"080", -- 0x013: CMP R00, 0x08 "111001" & X"01D", -- 0x014: JEQ 0x01D "101000" & X"070", -- 0x015: XIN R00, (0x07) "011001" & X"020", -- 0x016: AND R00, 0x02 "110010" & X"015", -- 0x017: JNZ 0x015 "000011" & X"070", -- 0x018: MOV R00, 0x07 "100101" & X"020", -- 0x019: XOUT (R00), 0x02 "000011" & X"020", -- 0x01A: MOV R00, 0x02 "111011" & X"05F", -- 0x01B: CALL 0x05F "110000" & X"012", -- 0x01C: JMP 0x012 "111011" & X"058", -- 0x01D: CALL 0x058 "000011" & X"000", -- 0x01E: MOV R00, 0x00 "001101" & X"000", -- 0x01F: MOVC (0x00), R00 "101000" & X"080", -- 0x020: XIN R00, (0x08) "001111" & X"080", -- 0x021: CMP R00, 0x08 "111001" & X"037", -- 0x022: JEQ 0x037 "001010" & X"001", -- 0x023: MOVC R01, (0x00) "000011" & X"800", -- 0x024: MOV R00, 0x80 "000011" & X"08F", -- 0x025: MOV R15, 0x08 "000110" & X"001", -- 0x026: MOVX (R01), R00 "010001" & X"010", -- 0x027: INC R00 "010001" & X"011", -- 0x028: INC R01 "010101" & X"01F", -- 0x029: DEC R15 "110010" & X"026", -- 0x02A: JNZ 0x026 "101000" & X"070", -- 0x02B: XIN R00, (0x07) "011001" & X"020", -- 0x02C: AND R00, 0x02 "110010" & X"02B", -- 0x02D: JNZ 0x02B "000000" & X"000", -- 0x02E: NOP "000011" & X"070", -- 0x02F: MOV R00, 0x07 "100101" & X"020", -- 0x030: XOUT (R00), 0x02 "000011" & X"020", -- 0x031: MOV R00, 0x02 "111011" & X"05F", -- 0x032: CALL 0x05F "001010" & X"000", -- 0x033: MOVC R00, (0x00) "010001" & X"010", -- 0x034: INC R00 "001101" & X"000", -- 0x035: MOVC (0x00), R00 "110000" & X"020", -- 0x036: JMP 0x020 "111011" & X"058", -- 0x037: CALL 0x058 "000011" & X"000", -- 0x038: MOV R00, 0x00 "001101" & X"000", -- 0x039: MOVC (0x00), R00 "101000" & X"080", -- 0x03A: XIN R00, (0x08) "001111" & X"080", -- 0x03B: CMP R00, 0x08 "111001" & X"052", -- 0x03C: JEQ 0x052 "000011" & X"070", -- 0x03D: MOV R00, 0x07 "100101" & X"010", -- 0x03E: XOUT (R00), 0x01 "101000" & X"070", -- 0x03F: XIN R00, (0x07) "011001" & X"010", -- 0x040: AND R00, 0x01 "110010" & X"03F", -- 0x041: JNZ 0x03F "001010" & X"001", -- 0x042: MOVC R01, (0x00) "000011" & X"800", -- 0x043: MOV R00, 0x80 "000011" & X"08F", -- 0x044: MOV R15, 0x08 "000100" & X"002", -- 0x045: MOVX R02, (R00) "001110" & X"012", -- 0x046: CMP R02, R01 "111010" & X"053", -- 0x047: JNE 0x053 "010001" & X"010", -- 0x048: INC R00 "010001" & X"011", -- 0x049: INC R01 "010101" & X"01F", -- 0x04A: DEC R15 "110010" & X"045", -- 0x04B: JNZ 0x045 "000011" & X"020", -- 0x04C: MOV R00, 0x02 "111011" & X"05F", -- 0x04D: CALL 0x05F "001010" & X"000", -- 0x04E: MOVC R00, (0x00) "010001" & X"010", -- 0x04F: INC R00 "001101" & X"000", -- 0x050: MOVC (0x00), R00 "110000" & X"03A", -- 0x051: JMP 0x03A "110000" & X"057", -- 0x052: JMP 0x057 "101000" & X"040", -- 0x053: XIN R00, (0x04) "011011" & X"100", -- 0x054: OR R00, 0x10 "100100" & X"040", -- 0x055: XOUT (0x04), R00 "110000" & X"057", -- 0x056: JMP 0x057 "110000" & X"057", -- 0x057: JMP 0x057 "111100" & X"000", -- 0x058: PUSH R00 "000011" & X"000", -- 0x059: MOV R00, 0x00 "100100" & X"080", -- 0x05A: XOUT (0x08), R00 "100100" & X"090", -- 0x05B: XOUT (0x09), R00 "100100" & X"0A0", -- 0x05C: XOUT (0x0A), R00 "111101" & X"000", -- 0x05D: POP R00 "111110" & X"000", -- 0x05E: RET "111100" & X"001", -- 0x05F: PUSH R01 "111100" & X"002", -- 0x060: PUSH R02 "111100" & X"003", -- 0x061: PUSH R03 "101000" & X"081", -- 0x062: XIN R01, (0x08) "101000" & X"092", -- 0x063: XIN R02, (0x09) "101000" & X"0A3", -- 0x064: XIN R03, (0x0A) "010000" & X"001", -- 0x065: ADD R01, R00 "010011" & X"002", -- 0x066: ADDC R02, 0x00 "010011" & X"003", -- 0x067: ADDC R03, 0x00 "100100" & X"081", -- 0x068: XOUT (0x08), R01 "100100" & X"092", -- 0x069: XOUT (0x09), R02 "100100" & X"0A3", -- 0x06A: XOUT (0x0A), R03 "111101" & X"003", -- 0x06B: POP R03 "111101" & X"002", -- 0x06C: POP R02 "111101" & X"001", -- 0x06D: POP R01 "111110" & X"000" -- 0x06E: RET ); begin PROM_READ: process(clk, ce) begin if rising_edge(clk) and ce = '1' then dout <= imem_rom(to_integer(addr)); end if; end process; end sdr_test_short;