## NOTE: Do not edit this file.
## Auto generated by Project Navigator for Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model
vcom -explicit  -93 "../../../lib/CPUs/JCpu/src/core/cpu_pkg.vhd"
vcom -explicit  -93 "../src/systest/sdr_config_pkg.vhd"
vcom -explicit  -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/sdr_pkg.vhd"
vcom -explicit  -93 "../../../lib/SDRAM/ddr_sdr_v1_3/src/mt46v16m16.vhd"
vcom   -93 "../ise91/systest/netgen/par/systest_timesim.vhd"
vcom   -93 "../src/systest/tb_systest.vhd"
vsim -t 1ps -sdfmax "/UUT=../ise91/systest/netgen/par/systest_timesim.sdf"  -lib work tb_systest
view wave
do {tb_systest.wtdo}
view structure
view signals
run 20us
## End