include $(VHDL_MAKE_HOME)/defs.mk

MOD_PATH := $(LIB_PATH)/JBUS/memory

SRCS += $(MOD_PATH)/src/rom_sim.vhd
SRCS += $(MOD_PATH)/src/rom_wb.vhd
SRCS += $(MOD_PATH)/src/tb_rom_wb.vhd

# Compile
TARGET := tb_rom_wb
ENTITY := tb_rom_wb
RUN_TIME := 1500ns
WAVE_FORMAT := vcd

include $(VHDL_MAKE_HOME)/ghdl.mk