# -----------------------------------------------------------
include $(VHDL_MAKE_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := FIFO_ASYNC

# -----------------------------------------------------------
$(PKG_NAME)_SRCS := $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_ctrl_pkg.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/gray_counter.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_async_ctrl.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_async_stage.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/reg_stage.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/FIFO/src/fifo_async.vhd

# -----------------------------------------------------------