# Macro for running Micron SDRAM VHDL model
#
# Compile Package Library (Require)
vcom mti_pkg.vhd

# Compile Micron Test Vector Generator (optional or use your own test)
vcom vec_gen.vhd
vcom ed_comnd.vhd
vsim vector_generate
run -all

# Compile Micron SDRAM
vcom mt48lc16m16a2.vhd

# Compile Micron Testbench (optional or use your own test bench)
vcom test.vhd

# Simulate Test
vsim tb

# Display waveform
onerror {resume}
add wave -logic /tb/u1/clk
add wave -logic /tb/u1/cke
add wave -logic /tb/u1/cs_n
add wave -logic /tb/u1/ras_n
add wave -logic /tb/u1/cas_n
add wave -logic /tb/u1/we_n
add wave -literal -decimal /tb/u1/addr
add wave -literal -unsigned /tb/u1/ba
add wave -literal -decimal /tb/u1/dq
add wave -literal /tb/u1/dqm
add wave -literal /tb/u1/operation
add wave -literal -decimal /tb/u1/mode_reg
add wave -logic /tb/u1/active_enable
add wave -logic /tb/u1/aref_enable
add wave -logic /tb/u1/burst_term
add wave -logic /tb/u1/mode_reg_enable
add wave -logic /tb/u1/prech_enable
add wave -logic /tb/u1/read_enable
add wave -logic /tb/u1/write_enable
add wave -logic /tb/u1/burst_length_1
add wave -logic /tb/u1/burst_length_2
add wave -logic /tb/u1/burst_length_4
add wave -logic /tb/u1/burst_length_8
add wave -logic /tb/u1/cas_latency_2
add wave -logic /tb/u1/cas_latency_3
add wave -literal /tb/u1/pre_chk
add wave -literal /tb/u1/act_chk
add wave -literal /tb/u1/bank_chk
add wave -literal -decimal /tb/u1/row_chk
add wave -literal -decimal /tb/u1/col_chk
add wave -logic /tb/u1/dq_in_chk
add wave -logic /tb/u1/dq_out_chk

# Run all test
run -all