# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/VGA_ctrl/ghdl/vga_backend.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
include $(LIB_PATH)/CPUs/JCpu/ghdl/jcpu_core.inc

# -----------------------------------------------------------
SRCS += $(VGA_BACKEND_SRCS)
SRCS += $(FIFO_ASYNC_SRCS)
SRCS += $(JCPU_CORE_SRCS)
SRCS += ../src/main_xrom.vhdl
SRCS += ../src/main_irom.vhdl
SRCS += ../src/cpu_embedded.vhd
SRCS += ../src/vga_ctrl_top.vhd
SRCS += ../src/tb_vga_ctrl.vhd

# -----------------------------------------------------------
# Compile
TARGET := tb_vga_ctrl
ENTITY := tb_vga_ctrl
RUN_TIME := 250us

include $(VHDL_HOME)/make/ghdl.mk
# -----------------------------------------------------------