-------------------------------------------------------------------------
-- Project: JCPU, a portable 8-bit RISC CPU written in VHDL
-- This file: The ROM file for use in your VHDL design
--
-- Copyright (C) 2007 J. Ahrensfeld
--
-- This program is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- This program is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
--
-- For questions and ideas, please contact the author at jens@jayfield.org
--
--------------------------------------------------------------------------

LIBRARY ieee;
use IEEE.STD_LOGIC_1164.ALL;
USE ieee.numeric_std.ALL;


ENTITY rom IS
	Generic 
	(
		addr_width 	: integer := 2;
		data_width 	: integer := 32
	);
	Port 
	(
		addr		: in  unsigned(addr_width-1 downto 0);
		dout		: out unsigned(data_width-1 downto 0)
	);
END rom;

ARCHITECTURE itest OF rom IS 
	
	subtype word_t is unsigned(data_width-1 downto 0);
	type word_array_t is array (0 to 2**addr_width-1) of word_t;

	-- Assembled from itest.jsm
	constant word_array : word_array_t :=
	(
		X"08100001", -- j 0x00400004 [main]             ; 5: j main
		X"3c011234", --	lui $1, 4660                    ; 7: lui $1, 0x1234
		X"34215678", --	ori $1, $1, 22136               ; 8: ori $1, $1, 0x5678
		X"3c035555", --	lui $3, 21845                   ; 9: lui $3, 0x5555
		X"3463aaaa", --	ori $3, $3, -21846              ; 10: ori $3, $3, 0xAAAA
		X"3c021000", --	lui $2, 4096                    ; 11: lui $2, 0x1000
		X"ac410000", --	sw $1, 0($2)                    ; 12: sw	$1, 0($2)
		X"ac430004", --	sw $3, 4($2)                    ; 13: sw	$3, 4($2)
		X"00000000", --	nop                             ; 14: sll $0, $0, 0
		X"ac400000", --	sw $0, 0($2)                    ; 15: sw	$0, 0($2)
		X"ac400004", --	sw $0, 4($2)                    ; 16: sw	$0, 4($2)
		X"8c410000", --	lw $1, 0($2)                    ; 17: lw  $1, 0($2)
		X"8c430004", --	lw $3, 4($2)                    ; 18: lw  $3, 4($2)
		X"00000000", --	nop                             ; 19: sll $0, $0, 0
		X"00000000", --	nop                             ; 20: sll $0, $0, 0
		X"08100001"	 --	j 0x00400004 [main]             ; 21: j   main
	);

begin

PROM_READ:
	dout <= word_array(to_integer(addr));

end itest;