## NOTE: Do not edit this file.
## Auto generated by Project Navigator for VHDL Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module vconfig
vcom -87 -explicit  vconfig_timesim.vhd
vcom -93 -explicit  vconfig_tb.vhd
vsim -t 1ps -sdfmax /UUT=vconfig_timesim.sdf  -lib work vconfig_tb
do vconfig_tb.udo
view wave
add wave *
view structure
view signals
run 6000ns
## End