# -----------------------------------------------------------
include $(VHDL_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
include $(LIB_PATH)/JBUS/busmaster/ghdl/busmaster_async.inc

# -----------------------------------------------------------
PKG_NAME := MIPS_CORE

# -----------------------------------------------------------
MOD_PATH := $(LIB_PATH)/CPUs/MIPS/src/core
$(PKG_NAME)_SRCS += $(FIFO_SYNC_SRCS)
$(PKG_NAME)_SRCS += $(FIFO_ASYNC_SRCS)
$(PKG_NAME)_SRCS += $(BUSMASTER_ASYNC_SRCS)
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_2w2r2c_ra.vhd
$(PKG_NAME)_SRCS += $(LIB_PATH)/rams/sim/src/dpram_1w1r2c_ra.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_util_pkg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_types.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_func_pkg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_instr.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_alu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_bcu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_reg.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_cam.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_tlb.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_dcache.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_icache.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_biu.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_cop.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_muldiv.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_pipeline.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_shifter.vhd
$(PKG_NAME)_SRCS += $(MOD_PATH)/mips_top.vhd

# -----------------------------------------------------------