/* ------------------------------------------------------------------ */ /* | Copyright Unpublished, MIPS Computer Systems, Inc. All Rights | */ /* | Reserved. This software contains proprietary and confidential | */ /* | information of MIPS and its suppliers. Use, disclosure or | */ /* | reproduction is prohibited without the prior express written | */ /* | consent of MIPS. | */ /* ------------------------------------------------------------------ */ /* inst.h 4.2 */ /* * inst.h -- instruction format defines */ /** ** UPDATE - 19 Sept 89 by Michael Smith ** ** Removed signed type to remove obnoxious C++ warning message. **/ #ifdef LANGUAGE_C #ifdef MIPSEB union mips_instruction { unsigned word; unsigned char byte[4]; struct { unsigned opcode : 6; unsigned target : 26; } j_format; struct { unsigned opcode : 6; unsigned rs : 5; unsigned rt : 5; unsigned simmediate : 16; } i_format; struct { unsigned opcode : 6; unsigned rs : 5; unsigned rt : 5; unsigned uimmediate : 16; } u_format; struct { unsigned opcode : 6; unsigned rs : 5; unsigned rt : 5; unsigned rd : 5; unsigned re : 5; unsigned func : 6; } r_format; struct { unsigned opcode : 6; unsigned : 1; unsigned fmt : 4; unsigned rt : 5; unsigned rd : 5; unsigned re : 5; unsigned func : 6; } f_format; }; #endif #ifdef MIPSEL union mips_instruction { unsigned word; unsigned char byte[4]; struct { unsigned target : 26; unsigned opcode : 6; } j_format; struct { unsigned simmediate : 16; unsigned rt : 5; unsigned rs : 5; unsigned opcode : 6; } i_format; struct { unsigned uimmediate : 16; unsigned rt : 5; unsigned rs : 5; unsigned opcode : 6; } u_format; struct { unsigned func : 6; unsigned re : 5; unsigned rd : 5; unsigned rt : 5; unsigned rs : 5; unsigned opcode : 6; } r_format; struct { unsigned func : 6; unsigned re : 5; unsigned rd : 5; unsigned rt : 5; unsigned fmt : 4; unsigned : 1; unsigned opcode : 6; } f_format; }; #endif #define spec_op 0x00 #define bcond_op 0x01 #define j_op 0x02 #define jal_op 0x03 #define beq_op 0x04 #define bne_op 0x05 #define blez_op 0x06 #define bgtz_op 0x07 #define addi_op 0x08 #define addiu_op 0x09 #define slti_op 0x0A #define sltiu_op 0x0B #define andi_op 0x0C #define ori_op 0x0D #define xori_op 0x0E #define lui_op 0x0F #define lb_op 0x20 #define lh_op 0x21 #define lw_op 0x23 #define lbu_op 0x24 #define lhu_op 0x25 #define ld_op 0x27 #define sb_op 0x28 #define sh_op 0x29 #define sw_op 0x2B #define sd_op 0x2F #define lwl_op 0x22 #define lwr_op 0x26 #define swl_op 0x2a #define swr_op 0x2e /* Co-processor sub-opcodes */ #define bc_op 0x08 #define mfc_op 0x00 #define cfc_op 0x02 #define mtc_op 0x04 #define ctc_op 0x06 /* Co-processor 0 opcodes */ #define cop0_op 0x10 #define lwc0_op 0x30 #define ldc0_op 0x34 #define swc0_op 0x38 #define sdc0_op 0x3c /* Co-processor 0 sub-opcodes */ #define tlbr_op 0x1 #define tlbwi_op 0x2 #define tlbwr_op 0x6 #define tlbp_op 0x8 #define rfe_op 0x10 /* Co-processor 1 opcodes */ #define cop1_op 0x11 #define lwc1_op 0x31 #define ldc1_op 0x35 #define swc1_op 0x39 #define sdc1_op 0x3D /* Co-processor 1 sub-opcodes */ #define fadd_op 0x00 #define fsub_op 0x01 #define fmpy_op 0x02 #define fdiv_op 0x03 #define fsqrt_op 0x04 #define fabs_op 0x05 #define fmov_op 0x06 #define fneg_op 0x07 #define fcvts_op 0x20 #define fcvtd_op 0x21 #define fcvte_op 0x22 #define fcvtw_op 0x24 #define fcmp_op 0x30 #define s_fmt 0 #define d_fmt 1 #define e_fmt 2 #define w_fmt 4 /* Other coprocessor opcodes */ #define cop2_op 0x12 #define lwc2_op 0x32 #define ldc2_op 0x36 #define swc2_op 0x3a #define sdc2_op 0x3e #define cop3_op 0x13 #define lwc3_op 0x33 #define ldc3_op 0x37 #define swc3_op 0x3b #define sdc3_op 0x3f /* bcond subopcodes */ #define bltz_op 0x00 #define bgez_op 0x01 #define bltzal_op 0x10 #define bgezal_op 0x11 /* special subopcodes */ #define sll_op 0x00 #define srl_op 0x02 #define sra_op 0x03 #define sllv_op 0x04 #define srlv_op 0x06 #define srav_op 0x07 #define jr_op 0x08 #define jalr_op 0x09 #define syscall_op 0x0C #define break_op 0x0D #define vcall_op 0x0E #define mfhi_op 0x10 #define mthi_op 0x11 #define mflo_op 0x12 #define mtlo_op 0x13 #define mult_op 0x18 #define multu_op 0x19 #define div_op 0x1A #define divu_op 0x1B #define add_op 0x20 #define addu_op 0x21 #define and_op 0x24 #define or_op 0x25 #define xor_op 0x26 #define nor_op 0x27 #define sub_op 0x22 #define subu_op 0x23 #define slt_op 0x2A #define sltu_op 0x2B #endif /* LANGUAGE_C */ #ifdef LANGUAGE_PASCAL #ifdef MIPSEB type mips_instruction = packed record case cardinal of 0: ( word: cardinal; ); 1: ( byte: packed array[0..3] of 0..255; ); 2: ( opcode: 0..63; target: 0..67108863; ); 3: ( opcode3: 0..63; rs: 0..31; rt: 0..31; simmediate: -32768..32767; ); 4: ( opcode4: 0..63; rs4: 0..63; rt4: 0..63; uimmediate: 0..65535; ); 5: ( opcode5: 0..63; rs5: 0..63; rt5: 0..63; rd5: 0..63; re5: 0..63; func: 0..63; ); end {record}; #endif #ifdef MIPSEL type mips_instruction = packed record case cardinal of 0: ( word: cardinal; ); 1: ( byte: packed array[0..3] of 0..255; ); 2: ( target: 0..67108863; opcode: 0..63; ); 3: ( simmediate: -32768..32767; rt: 0..31; rs: 0..31; opcode3: 0..63; ); 4: ( uimmediate: 0..65535; rt4: 0..63; rs4: 0..63; opcode4: 0..63; ); 5: ( func: 0..63; re5: 0..63; rd5: 0..63; rt5: 0..63; rs5: 0..63; opcode5: 0..63; ); end {record}; #endif #define spec_op 16#00 #define bcond_op 16#01 #define j_op 16#02 #define jal_op 16#03 #define beq_op 16#04 #define bne_op 16#05 #define blez_op 16#06 #define bgtz_op 16#07 #define addi_op 16#08 #define addiu_op 16#09 #define slti_op 16#0A #define sltiu_op 16#0B #define andi_op 16#0C #define ori_op 16#0D #define xori_op 16#0E #define lui_op 16#0F #define lb_op 16#20 #define lh_op 16#21 #define lw_op 16#23 #define lbu_op 16#24 #define lhu_op 16#25 #define ld_op 16#27 #define sb_op 16#28 #define sh_op 16#29 #define sw_op 16#2B #define sd_op 16#2F #define lwl_op 16#22 #define lwr_op 16#26 #define swl_op 16#2a #define swr_op 16#2e /* Co-processor sub-opcodes */ #define bc_op 16#08 #define mfc_op 16#00 #define cfc_op 16#02 #define mtc_op 16#04 #define ctc_op 16#06 /* Co-processor 0 opcodes */ #define cop0_op 16#10 #define lwc0_op 16#30 #define ldc0_op 16#34 #define swc0_op 16#38 #define sdc0_op 16#3c /* Co-processor 0 sub-opcodes */ #define tlbr_op 16#1 #define tlbwi_op 16#2 #define tlbwr_op 16#6 #define tlbp_op 16#8 #define rfe_op 16#10 /* Co-processor 1 opcodes */ #define cop1_op 16#11 #define lwc1_op 16#31 #define ldc1_op 16#35 #define swc1_op 16#39 #define sdc1_op 16#3D /* Co-processor 1 sub-opcodes */ #define fadd_op 16#00 #define fsub_op 16#01 #define fmpy_op 16#02 #define fdiv_op 16#03 #define fsqrt_op 16#04 #define fabs_op 16#05 #define fmov_op 16#06 #define fneg_op 16#07 #define fcvts_op 16#20 #define fcvtd_op 16#21 #define fcvte_op 16#22 #define fcvtw_op 16#24 #define fcmp_op 16#30 #define s_fmt 0 #define d_fmt 1 #define e_fmt 2 #define w_fmt 4 /* Other coprocessor opcodes */ #define cop2_op 16#12 #define lwc2_op 16#32 #define ldc2_op 16#36 #define swc2_op 16#3a #define sdc2_op 16#3e #define cop3_op 16#13 #define lwc3_op 16#33 #define ldc3_op 16#37 #define swc3_op 16#3b #define sdc3_op 16#3f /* bcond subopcodes */ #define bltz_op 16#00 #define bgez_op 16#01 #define bltzal_op 16#10 #define bgezal_op 16#11 /* special subopcodes */ #define sll_op 16#00 #define srl_op 16#02 #define sra_op 16#03 #define sllv_op 16#04 #define srlv_op 16#06 #define srav_op 16#07 #define jr_op 16#08 #define jalr_op 16#09 #define syscall_op 16#0C #define break_op 16#0D #define vcall_op 16#0E #define mfhi_op 16#10 #define mthi_op 16#11 #define mflo_op 16#12 #define mtlo_op 16#13 #define mult_op 16#18 #define multu_op 16#19 #define div_op 16#1A #define divu_op 16#1B #define add_op 16#20 #define addu_op 16#21 #define and_op 16#24 #define or_op 16#25 #define xor_op 16#26 #define nor_op 16#27 #define sub_op 16#22 #define subu_op 16#23 #define slt_op 16#2A #define sltu_op 16#2B #endif /* LANGUAGE_PASCAL */