Commit Graph
3 Commits
Author SHA1 Message Date
jens c5d08ec384 [UART]
- added UART with FIFO

git-svn-id: http://moon:8086/svn/vhdl/trunk@1353 cc03376c-175c-47c8-b038-4cd826a8556b
2016-12-20 20:36:04 +00:00
jens 11fa96a4e7 [Uart]
- uart_wb instantiates uart
- merged uart_tx, uart_rx into uart
- added uart implementations for Xilinx (kcuart) and Altera (JTAG)

git-svn-id: http://moon:8086/svn/vhdl/trunk@1239 cc03376c-175c-47c8-b038-4cd826a8556b
2015-05-27 15:50:32 +00:00
jens d3bd08bb52 Initial import
git-svn-id: http://moon:8086/svn/vhdl/trunk@5 cc03376c-175c-47c8-b038-4cd826a8556b
2008-08-23 08:20:30 +00:00