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- made GPIO 0 bidirectional (added GPIO_DIR register)

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- removed GPIO 1
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git-svn-id: http://moon:8086/svn/vhdl/trunk@792 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2010-03-13 16:46:21 +00:00
parent db662f411f
commit fcce3dcf32
7 changed files with 1377 additions and 1378 deletions
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projects/mips_sys/src/mips_sys.vhd
+41 -22
View File
@@ -126,6 +126,11 @@ PORT
sys_ps2_1_clk : inout std_logic;
sys_ps2_1_data : inout std_logic;
sys_phy_rstn : out std_logic;
sys_phy_mdc : out std_logic;
sys_phy_mdio : inout std_logic;
sys_phy_int : in std_logic;
sys_error : out unsigned(1 downto 0) -- indicates Errors
);
@@ -267,10 +272,8 @@ ARCHITECTURE behavior OF mips_sys IS
DAT_O : out unsigned(31 downto 0);
INT_TIM_O : out STD_LOGIC;
sys_gpo0 : out unsigned(31 downto 0);
sys_gpo1 : out unsigned(31 downto 0);
sys_gpi0 : in unsigned(31 downto 0);
sys_gpi1 : in unsigned(31 downto 0)
sys_gpi_0 : in unsigned(31 downto 0);
sys_gpo_0 : out unsigned(31 downto 0)
);
END COMPONENT;
@@ -458,10 +461,12 @@ ARCHITECTURE behavior OF mips_sys IS
signal SRDY_O_ps2_1 : std_logic;
signal SDAT_O_ps2_1 : unsigned(31 downto 0);
signal gpo0 : unsigned(31 downto 0);
signal gpo1 : unsigned(31 downto 0);
signal gpi0 : unsigned(31 downto 0);
signal gpi1 : unsigned(31 downto 0);
signal gpi_0 : unsigned(31 downto 0);
signal gpo_0 : unsigned(31 downto 0);
signal ac97_inten : std_logic;
signal usb_inten : std_logic;
signal phy_inten : std_logic;
signal debug : unsigned(1 downto 0);
@@ -488,20 +493,36 @@ ARCHITECTURE behavior OF mips_sys IS
BEGIN
------------------------------------
-- GPO1 bits used for
-- 0 : USB reset
-- 1 : USB interrupt enable
-- 2 : AC97 interrupt enable
-- others : reserved
-- GPIO_0 bits used for
-- 8.. 0 = O: LED 8..0
-- 11.. 9 = free
-- 12 = O: USB RST
-- 13 = O: USB INTEN
-- 14 = free
-- 15 = O: AC97 INTEN
-- 32..16 = I: DIP 7..0
-- 28..24 = I: BTN 4..0
-- 29 = O: PHY RESET
-- 30 = O: PHY MDC
-- 31 = IO: PHY MDIO
------------------------------------
gpi_0(28 downto 24) <= sys_btn;
gpi_0(23 downto 16) <= sys_dip;
gpi_0(31) <= sys_phy_mdio;
sys_led <= gpo_0(8 downto 0);
sys_usb_rstn <= not gpo_0(12);
usb_inten <= gpo_0(13);
phy_inten <= gpo_0(14);
ac97_inten <= gpo_0(15);
sys_phy_rstn <= not gpo_0(29);
sys_phy_mdc <= gpo_0(30);
sys_phy_mdio <= gpo_0(31);
eb <= sys_dip(7);
gpi0(4 downto 0) <= sys_btn;
gpi1(7 downto 0) <= sys_dip;
sys_led <= gpo0(8 downto 0);
sys_error <= debug;
nmi <= not sys_rst_n_in;
rst_in <= not sys_rst_n_in and sys_btn(0);
sys_usb_rstn <= not gpo1(0);
sys_flash_byten <= '1';
sys_usb_a <= usb_Addr(3 downto 2);
sys_flash_a <= '0' & flash_addr(24 downto 2) & '0';
@@ -559,7 +580,7 @@ int_sample:
process(CLK_O)
begin
if rising_edge(CLK_O) then
INT <= int_timer & (INT_O_ps2_0 or INT_O_ps2_1) & (INT_O_vga or (gpo1(2) and INT_O_ac97)) & (gpo1(1) and sys_usb_int) & (int_uart0 or int_uart1) & sys_btn(4);
INT <= int_timer & (INT_O_ps2_0 or INT_O_ps2_1) & (INT_O_vga or (ac97_inten and INT_O_ac97)) & (usb_inten and sys_usb_int) & (int_uart0 or int_uart1) & sys_btn(4);
end if;
end process;
@@ -747,10 +768,8 @@ inst_gpio_wb : gpio_wb
DAT_O => SDAT_O_gpio,
INT_TIM_O => int_timer,
sys_gpo0 => gpo0,
sys_gpo1 => gpo1,
sys_gpi0 => gpi0,
sys_gpi1 => gpi1
sys_gpi_0 => gpi_0,
sys_gpo_0 => gpo_0
);
inst_flash_port : async_port_wb