diff --git a/projects/mips_de0_nano/quartus/mips/JMips.qsf b/projects/mips_de0_nano/quartus/mips/JMips.qsf
index cd17cd5..9a4b901 100644
--- a/projects/mips_de0_nano/quartus/mips/JMips.qsf
+++ b/projects/mips_de0_nano/quartus/mips/JMips.qsf
@@ -286,8 +286,8 @@ set_global_assignment -name VHDL_FILE ../../../../lib/misc/gpio_wb.vhd
 set_global_assignment -name VHDL_FILE ../../../../lib/misc/utils_pkg.vhd
 set_global_assignment -name VHDL_FILE ../../../../lib/misc/rom_wb.vhd
 set_global_assignment -name VHDL_FILE ../../../../lib/misc/ram_wb.vhd
-set_global_assignment -name VHDL_FILE ../../../../lib/rams/dpram_1w1r2c_ra_alt.vhd
-set_global_assignment -name VHDL_FILE ../../../../lib/rams/dpram_2w2r2c_ra_alt.vhd
+set_global_assignment -name VHDL_FILE ../../../../lib/rams/altera/dpram_1w1r2c_ra.vhd
+set_global_assignment -name VHDL_FILE ../../../../lib/rams/altera/dpram_2w2r2c_ra.vhd
 set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_sync_ctrl.vhd
 set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_sync.vhd
 set_global_assignment -name VHDL_FILE ../../../../lib/FIFO/src/fifo_ctrl_pkg.vhd