From f602a4baa7aaa52fb849a5a5544ae684f332ac09 Mon Sep 17 00:00:00 2001 From: Jens Ahrensfeld Date: Thu, 25 Mar 2010 21:11:10 +0000 Subject: [PATCH] - minor changes in register interface Committed on the Free edition of March Hare Software CVSNT Server. Upgrade to CVS Suite for more features and support: http://march-hare.com/cvsnt/ git-svn-id: http://moon:8086/svn/vhdl/trunk@824 cc03376c-175c-47c8-b038-4cd826a8556b --- lib/emac/src/emac_top_jb.vhd | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/lib/emac/src/emac_top_jb.vhd b/lib/emac/src/emac_top_jb.vhd index 0aeebef..bb82cc2 100644 --- a/lib/emac/src/emac_top_jb.vhd +++ b/lib/emac/src/emac_top_jb.vhd @@ -49,17 +49,19 @@ ARCHITECTURE behavior OF emac_top_jb IS signal tx_ctrl_in : tx_ctrl_in_t; signal tx_ctrl_out : tx_ctrl_out_t; signal tx_din : unsigned(31 downto 0); + signal tx_din_vld : std_logic; signal rx_ctrl_in : rx_ctrl_in_t; signal rx_ctrl_out : rx_ctrl_out_t; + signal rx_dout : unsigned(31 downto 0); + signal rx_dout_vld : std_logic; signal rx_int_en : std_logic; signal tx_int_en : std_logic; signal irq_rx : std_logic; signal irq_tx : std_logic; - signal if_rdy : std_logic; begin SRDY_O <= CYC_I; @@ -71,9 +73,9 @@ registers_write: process(CLK_I) begin if rising_edge(CLK_I) then - tx_ctrl_in.data_vld <= '0'; - tx_ctrl_in.tx_req_en <= '0'; - rx_ctrl_in.uncommit <= '0'; + tx_din_vld <= '0'; + tx_ctrl_in.tx_req_en <= '0'; + rx_ctrl_in.uncommit <= '0'; if RST_I = '1' then rx_int_en <= '0'; tx_int_en <= '0'; @@ -93,7 +95,7 @@ registers_write: tx_ctrl_in.tx_size <= DAT_I(31 downto 16); when "0010" => - tx_ctrl_in.data_vld <= '1'; + tx_din_vld <= '1'; tx_din <= DAT_I; when others => null; @@ -107,13 +109,14 @@ registers_read: begin if rising_edge(CLK_I) then rx_ctrl_in.data_read <= '0'; - ACK_O <= '0'; + ACK_O <= rx_dout_vld and CYC_I and not WE_I; + DAT_O <= rx_dout; if (STB_I and CYC_I) = '1' then - ACK_O <= not WE_I; - DAT_O <= (others => '0'); case ADDR_I(5 downto 2) is when "0000" => + ACK_O <= not WE_I; + DAT_O <= (others => '0'); DAT_O(31) <= tx_ctrl_in.tx_er; DAT_O(30) <= mii_rx_er; DAT_O(29) <= mii_col; @@ -123,12 +126,11 @@ registers_read: DAT_O(5) <= tx_int_en; DAT_O(4) <= rx_int_en; when "0001" => + ACK_O <= not WE_I; DAT_O <= tx_ctrl_out.tx_size & rx_ctrl_out.rx_size; when "0010" => rx_ctrl_in.data_read <= not WE_I; - ACK_O <= rx_ctrl_out.data_vld; - DAT_O <= rx_dout; when others => null; end case; @@ -155,6 +157,7 @@ inst_emac_rx : entity work.emac_rx ( clk => CLK_I, rst => RST_I, + dout_vld => rx_dout_vld, dout => rx_dout, ctrl_in => rx_ctrl_in, ctrl_out => rx_ctrl_out, @@ -178,6 +181,7 @@ inst_emac_tx : entity work.emac_tx ( clk => CLK_I, rst => RST_I, + din_vld => tx_din_vld, din => tx_din, ctrl_in => tx_ctrl_in, ctrl_out => tx_ctrl_out,