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- removed pushd and popd from control lines. Reduce by 2.

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Committed on the Free edition of March Hare Software CVSNT Server.
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git-svn-id: http://moon:8086/svn/vhdl/trunk@921 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2011-06-25 15:09:09 +00:00
parent 5430521f4f
commit f265661633
2 changed files with 5 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/JCpu/src/core/cpu.vhd
+3 -3
View File
@@ -306,8 +306,8 @@ pc_pushpop:
process(ctrl.lines, int_pc_load, int_stk_push, int_stk_pop, was_pop2pc)
begin
pc_load <= ctrl.lines.pc_load or int_pc_load;
stk_push <= (ctrl.lines.stk_pushd or ctrl.lines.stk_push) or (int_stk_push and not was_pop2pc);
stk_pop <= ctrl.lines.stk_popd or int_stk_pop or (ctrl.lines.stk_pop and not int_pc_load);
stk_push <= ctrl.lines.stk_push or (int_stk_push and not was_pop2pc);
stk_pop <= (ctrl.lines.stk_pop and not ctrl.lines.pc_load) or int_stk_pop or ((ctrl.lines.stk_pop and ctrl.lines.pc_load) and not int_pc_load);
end process;
lines_delay:
@@ -324,7 +324,7 @@ stk_mux:
begin
if was_pcld = '1' and int_stk_push = '1' then
stk_in <= idata;
elsif ctrl.lines.stk_pushd = '1' then
elsif ctrl.lines.stk_push = '1' and ctrl.lines.pc_load = '0' then
stk_in <= creg_ctrl_out.stk_high & reg_a_dout;
else
stk_in <= pc_next;
lib/CPUs/JCpu/src/core/cpu_pkg.vhd
+2 -6
View File
@@ -116,8 +116,6 @@ package cpu_pkg is
pc_inc : STD_LOGIC;
stk_push : STD_LOGIC;
stk_pop : STD_LOGIC;
stk_pushd : STD_LOGIC;
stk_popd : STD_LOGIC;
mem_access : mem_access_t;
mem_read : STD_LOGIC;
mem_write : STD_LOGIC;
@@ -302,8 +300,6 @@ package body cpu_pkg is
result.pc_inc := '0';
result.stk_push := '0';
result.stk_pop := '0';
result.stk_pushd := '0';
result.stk_popd := '0';
result.reg_we := '0';
result.reg_src_sel := alu_src;
result.ddata_src_sel := reg_a;
@@ -761,12 +757,12 @@ package body cpu_pkg is
end if;
when "PUSH|R " => -- push
if iphase = 0 then
result.stk_pushd := '1';
result.stk_push := '1';
end if;
when "POP|R " => -- pop
result.reg_src_sel := stk_src;
if iphase = 0 then
result.stk_popd := '1';
result.stk_pop := '1';
elsif iphase = 1 then
result.reg_we := '1';
end if;