diff --git a/Common/sim/compile_altera.do b/Common/sim/compile_altera.do index a9876d0..416e0fd 100644 --- a/Common/sim/compile_altera.do +++ b/Common/sim/compile_altera.do @@ -1,24 +1,32 @@ -vlib altera -vcom -93 -work altera ../libsrc/altera/altera_primitives_components.vhd -vcom -93 -work altera ../libsrc/altera/altera_primitives.vhd -vcom -93 -work altera ../libsrc/altera/altera_internal_syn.vhd -vcom -93 -work altera ../libsrc/altera/altera_europa_support_lib.vhd -vcom -93 -work altera ../libsrc/altera/altera_standard_functions.vhd -vcom -93 -work altera ../libsrc/altera/altera_syn_attributes.vhd +vlib build +vlib build/altera +vlib build/altera -vlib cycloneive +vlib build/altera/altera +vmap altera build/altera/altera -vcom -93 -work cycloneive ../libsrc/cycloneive/cycloneive_atoms.vhd -vcom -93 -work cycloneive ../libsrc/cycloneive/cycloneive_components.vhd +vcom -93 -work altera altera/libsrc/altera/altera_primitives_components.vhd +vcom -93 -work altera altera/libsrc/altera/altera_primitives.vhd +vcom -93 -work altera altera/libsrc/altera/altera_internal_syn.vhd +vcom -93 -work altera altera/libsrc/altera/altera_europa_support_lib.vhd +vcom -93 -work altera altera/libsrc/altera/altera_standard_functions.vhd +vcom -93 -work altera altera/libsrc/altera/altera_syn_attributes.vhd -vlib altera_lnsim +vlib build/altera/cycloneive +vmap cycloneive build/altera/cycloneive -vcom -93 -work altera_lnsim ../libsrc/altera_lnsim/altera_lnsim_components.vhd +vcom -93 -work cycloneive altera/libsrc/cycloneive/cycloneive_atoms.vhd +vcom -93 -work cycloneive altera/libsrc/cycloneive/cycloneive_components.vhd -#vmap work altera_lnsim -vlib cyclonev +vlib build/altera/altera_lnsim +vmap altera_lnsim build/altera/altera_lnsim -vcom -93 -work cyclonev ../libsrc/cyclonev/cyclonev_atoms.vhd -vcom -93 -work cyclonev ../libsrc/cyclonev/cyclonev_components.vhd +vcom -93 -work altera_lnsim altera/libsrc/altera_lnsim/altera_lnsim_components.vhd + +vlib build/altera/cyclonev +vmap cyclonev build/altera/cyclonev + +vcom -93 -work cyclonev altera/libsrc/cyclonev/cyclonev_atoms.vhd +vcom -93 -work cyclonev altera/libsrc/cyclonev/cyclonev_components.vhd diff --git a/Common/sim/compile_simprim.do b/Common/sim/compile_simprim.do index 9f7ba37..194fee0 100644 --- a/Common/sim/compile_simprim.do +++ b/Common/sim/compile_simprim.do @@ -1,6 +1,7 @@ -vlib simprim +vlib build +vlib build/xilinx -set XILINX $env(XILINX) +vlib build/xilinx/simprim vcom -93 -work simprim $XILINX/vhdl/src/simprims/simprim_Vcomponents_mti.vhd vcom -93 -work simprim $XILINX/vhdl/src/simprims/simprim_Vpackage_mti.vhd diff --git a/Common/sim/compile_unisim.do b/Common/sim/compile_unisim.do index 303a370..520abf5 100644 --- a/Common/sim/compile_unisim.do +++ b/Common/sim/compile_unisim.do @@ -1,4 +1,8 @@ -vlib unisim +vlib build +vlib build/xilinx + +vlib build/xilinx/unisim +vmap unisim build/xilinx/unisim vcom -93 -work unisim xilinx/libsrc/unisims/unisim_vpkg.vhd vcom -93 -work unisim xilinx/libsrc/unisims/unisim_vcomp.vhd