jens/vhdl
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- reverted to clk2

Browse Source 
git-svn-id: http://moon:8086/svn/vhdl/trunk@1106 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
jens
2015-05-17 10:33:43 +00:00
parent 9453e9b1aa
commit eaec09fd09
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files
lib/CPUs/MIPS/src/core/mips_pipeline.vhd
+2 -2
View File
@@ -305,9 +305,9 @@ proc_stage_pc_next:
end process; end process;
proc_stage_branch: proc_stage_branch:
process(clk_1) process(clk_2)
begin begin
if falling_edge(clk_1) then if rising_edge(clk_2) then
if branch_ce = '1' then if branch_ce = '1' then
pc.branch_take <= '0'; pc.branch_take <= '0';
if EX_stage.ctrl.branch = '1' then if EX_stage.ctrl.branch = '1' then