- Ratio and gain are set at synthesis time (simpler)

git-svn-id: http://moon:8086/svn/vhdl/trunk@176 cc03376c-175c-47c8-b038-4cd826a8556b
This commit is contained in:
2008-12-30 18:56:12 +00:00
parent 7c7fc19162
commit dc63b8df76
5 changed files with 48 additions and 120 deletions
+8 -23
View File
@@ -29,15 +29,13 @@ use work.cordic_pkg.all;
(
nbits_in : integer := 18;
nbits_in_frac : integer := 16;
nbits_out : integer := 18;
nbits_out_frac : integer := 16;
nbits_out : integer := 24;
nbits_out_frac : integer := 22;
lo_nbits_phase : integer := 20;
lo_nbits_freq : integer := 20;
cic_nstages : integer := 3;
cic_max_ratio : integer := 1024;
cic_max_diff_delay : integer := 2;
cic_scale_nbits_min : integer := 9;
cic_scale_nbits_max : integer := 32
cic_ratio : integer := 64;
cic_scale_nbits : integer := 18
);
PORT
(
@@ -47,9 +45,6 @@ use work.cordic_pkg.all;
lo_nco_en : in std_logic;
lo_freq_in : in unsigned(lo_nbits_freq-1 downto 0);
lo_phase_in : in unsigned(lo_nbits_phase-1 downto 0);
cic_ratio : in natural range 1 to cic_max_ratio;
cic_diff_delay : in natural range 1 to cic_max_diff_delay;
cic_shift_in : in natural range 0 to cic_scale_nbits_max;
din_i : in signed(nbits_in-1 downto 0);
din_q : in signed(nbits_in-1 downto 0);
dout_i : out signed(nbits_out-1 downto 0);
@@ -72,10 +67,8 @@ ARCHITECTURE behavior OF syn_ddc IS
lo_nbits_phase : integer;
lo_nbits_freq : integer;
cic_nstages : integer;
cic_max_ratio : integer;
cic_max_diff_delay : integer;
cic_scale_nbits_min : integer;
cic_scale_nbits_max : integer
cic_ratio : integer;
cic_scale_nbits : integer
);
PORT
(
@@ -85,9 +78,6 @@ ARCHITECTURE behavior OF syn_ddc IS
lo_nco_en : in std_logic;
lo_freq_in : in unsigned(lo_nbits_freq-1 downto 0);
lo_phase_in : in unsigned(lo_nbits_phase-1 downto 0);
cic_ratio : in natural range 1 to cic_max_ratio;
cic_diff_delay : in natural range 1 to cic_max_diff_delay;
cic_shift_in : in natural range 0 to cic_scale_nbits_max;
din_i : in sfixed;
din_q : in sfixed;
dout_i : out sfixed;
@@ -116,10 +106,8 @@ BEGIN
lo_nbits_phase => lo_nbits_phase,
lo_nbits_freq => lo_nbits_freq,
cic_nstages => cic_nstages,
cic_max_ratio => cic_max_ratio,
cic_max_diff_delay => cic_max_diff_delay,
cic_scale_nbits_min => cic_scale_nbits_min,
cic_scale_nbits_max => cic_scale_nbits_max
cic_ratio => cic_ratio,
cic_scale_nbits => cic_scale_nbits
)
PORT MAP
(
@@ -129,9 +117,6 @@ BEGIN
lo_nco_en => lo_nco_en,
lo_freq_in => lo_freq_in,
lo_phase_in => lo_phase_in,
cic_ratio => cic_ratio,
cic_diff_delay => cic_diff_delay,
cic_shift_in => cic_shift_in,
din_i => ddc_din_i,
din_q => ddc_din_q,
dout_i => ddc_dout_i,