diff --git a/lib/CPUs/JCpu/src/cpu_embedded.vhd b/lib/CPUs/JCpu/src/cpu_embedded.vhd index 1990170..56c6dec 100644 --- a/lib/CPUs/JCpu/src/cpu_embedded.vhd +++ b/lib/CPUs/JCpu/src/cpu_embedded.vhd @@ -34,7 +34,6 @@ entity cpu_embedded is ce : in STD_LOGIC; int_in : in STD_LOGIC; int_ack : out STD_LOGIC; - xmem_wait : in STD_LOGIC; xmem_we : out STD_LOGIC; xmem_re : out STD_LOGIC; xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); @@ -56,7 +55,6 @@ architecture rtl of cpu_embedded is ce : in STD_LOGIC; int_in : in STD_LOGIC; int_ack : out STD_LOGIC; - xmem_wait : in STD_LOGIC; xmem_we : out STD_LOGIC; xmem_re : out STD_LOGIC; instr_din : in unsigned (IMEM_DATA_WIDTH-1 downto 0); @@ -87,7 +85,6 @@ inst_cpu: cpu ce => ce, int_in => int_in, int_ack => int_ack, - xmem_wait => xmem_wait, xmem_we => xmem_we, xmem_re => xmem_re, instr_din => irom_data, diff --git a/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd b/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd index ede20d5..dafb553 100644 --- a/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd +++ b/lib/CPUs/JCpu/src/tb_cpu_embedded.vhd @@ -41,7 +41,6 @@ ARCHITECTURE behavior OF tb_cpu_embedded IS ce : in STD_LOGIC; int_in : in STD_LOGIC; int_ack : out STD_LOGIC; - xmem_wait : in STD_LOGIC; xmem_we : out STD_LOGIC; xmem_re : out STD_LOGIC; xmem_din : in unsigned (DMEM_DATA_WIDTH-1 downto 0); @@ -58,7 +57,6 @@ ARCHITECTURE behavior OF tb_cpu_embedded IS signal ce : std_logic := '0'; signal int_in : std_logic := '0'; signal int_ack : std_logic; - signal xmem_wait : std_logic := '0'; signal xmem_din : dmem_data_t := (others => '-'); signal xmem_dout : dmem_data_t; signal xmem_addr : dmem_addr_t; @@ -77,7 +75,6 @@ uut: cpu_embedded ce => ce, int_in => int_in, int_ack => int_ack, - xmem_wait => xmem_wait, xmem_we => xmem_we, xmem_re => xmem_re, xmem_din => xmem_din, diff --git a/lib/CPUs/JCpu/src/tb_cpu_itest.vhd b/lib/CPUs/JCpu/src/tb_cpu_itest.vhd index 80d8c43..243ba8f 100644 --- a/lib/CPUs/JCpu/src/tb_cpu_itest.vhd +++ b/lib/CPUs/JCpu/src/tb_cpu_itest.vhd @@ -47,7 +47,6 @@ ARCHITECTURE behavior OF tb_cpu IS ce : in STD_LOGIC; int_in : in STD_LOGIC; int_ack : out STD_LOGIC; - xmem_wait : in STD_LOGIC; xmem_we : out STD_LOGIC; xmem_re : out STD_LOGIC; instr_din : in unsigned (IMEM_DATA_WIDTH-1 downto 0); @@ -77,7 +76,6 @@ ARCHITECTURE behavior OF tb_cpu IS signal ce : std_logic := '0'; signal int_in : std_logic := '0'; signal int_ack : std_logic; - signal xmem_wait : std_logic := '1'; signal irom_data : unsigned (IMEM_DATA_WIDTH-1 downto 0) := (others => '-'); signal irom_addr : unsigned (IMEM_ADDR_WIDTH-1 downto 0); signal xmem_din : dmem_data_t := (others => '-'); @@ -112,7 +110,6 @@ uut: cpu ce => ce, int_in => int_in, int_ack => int_ack, - xmem_wait => xmem_wait, xmem_we => xmem_we, xmem_re => xmem_re, instr_din => irom_data, @@ -137,21 +134,6 @@ CLK_GEN: process clk <= not clk; end process; -XWAIT_GEN:process(rst, clk) - variable cnt : unsigned(3 downto 0); - begin - if (rst = '1') then - cnt := (others => '1'); - elsif rising_edge(clk) then - if cnt /= "0000" then - cnt := cnt - 1; - else - cnt := (others => '1'); - xmem_wait <= not xmem_wait; - end if; - end if; - end process; - STIMULUS: process file RESULT: text open write_mode is "../tools/opc.list"; variable L: line;