diff --git a/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw b/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw
index b78e85c..567d19e 100644
--- a/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw
+++ b/projects/vga_ctrl/ghdl/tb_vga_ctrl.gtkw
@@ -1,15 +1,15 @@
 [*]
 [*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
-[*] Mon Mar 29 08:37:38 2021
+[*] Mon Mar 29 14:17:20 2021
 [*]
 [dumpfile] "/home/jens/work/vhdl/trunk/projects/vga_ctrl/ghdl/build/tb_vga_ctrl/tb_vga_ctrl.fst"
-[dumpfile_mtime] "Mon Mar 29 08:33:31 2021"
-[dumpfile_size] 14527
+[dumpfile_mtime] "Mon Mar 29 14:17:07 2021"
+[dumpfile_size] 287027
 [savefile] "/home/jens/work/vhdl/trunk/projects/vga_ctrl/ghdl/build/tb_vga_ctrl/tb_vga_ctrl.gtkw"
 [timestart] 0
 [size] 1856 1136
-[pos] -2 -2
-*-38.647770 0 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+[pos] -1 -1
+*-38.647770 179025000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [sst_width] 317
 [signals_width] 328
 [sst_expanded] 1
@@ -22,8 +22,6 @@ uut.cpu_red[7:0]
 uut.cpu_din[7:0]
 @28
 uut.scan_rdy
-uut.scan_rdy_h
-uut.scan_rdy_v
 uut.src_pos_x
 uut.src_pos_y
 uut.stat_hpos
@@ -40,7 +38,6 @@ uut.sys_clk_in
 uut.sys_rst_in
 uut.sys_vga_clk_ce
 uut.sys_vga_clk_in
-uut.sys_vga_clk_out
 uut.cg_en
 uut.cg_draw
 uut.cg_posx_we