From d51a303d9ce6d5259a9666317be46ae034f0ddcd Mon Sep 17 00:00:00 2001
From: Jens Ahrensfeld <jens@jayfield.org>
Date: Fri, 9 Apr 2010 10:40:27 +0000
Subject: [PATCH] - added emac Committed on the Free edition of March Hare
 Software CVSNT Server. Upgrade to CVS Suite for more features and support:
 http://march-hare.com/cvsnt/

git-svn-id: http://moon:8086/svn/vhdl/trunk@901 cc03376c-175c-47c8-b038-4cd826a8556b
---
 .../mips_sys/ise101/mips_sys/ucf/systest.ucf  | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf b/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf
index b7ae486..14e7129 100644
--- a/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf
+++ b/projects/mips_sys/ise101/mips_sys/ucf/systest.ucf
@@ -571,3 +571,59 @@ NET sys_ps2_1_data SLEW = SLOW;
 NET sys_ps2_1_data DRIVE = 2;
 NET sys_ps2_1_data TIG;
 
+#------------------------------------------------------------------------------
+# IO Pad Location Constraints / Properties for Ethernet PHY
+#------------------------------------------------------------------------------
+# MDC
+Net sys_phy_mdc LOC = D1;
+Net sys_phy_mdc IOSTANDARD = LVCMOS25;
+
+# MDIO
+Net sys_phy_mdio LOC = G4;
+Net sys_phy_mdio IOSTANDARD = LVCMOS25;
+
+# /RST
+Net sys_phy_rstn LOC = D10;
+Net sys_phy_rstn TIG;
+
+# INT
+Net sys_phy_int LOC = H4;
+Net sys_phy_int TIG;
+
+#### Module Ethernet_MAC constraints
+
+NET "sys_phy_tx_clk" TNM_NET = "phy_tx_clk";
+TIMESPEC "TS_phy_tx_clk" = PERIOD "phy_tx_clk" 8.0 ns HIGH 50 %;
+
+NET "sys_phy_rx_clk" TNM_NET = "phy_rx_clk";
+TIMESPEC "TS_phy_rx_clk" = PERIOD "phy_rx_clk" 8.0 ns HIGH 50 %;
+
+Net sys_phy_crs LOC = D5;
+Net sys_phy_col LOC = E3;
+
+Net sys_phy_tx_clk LOC=C15;
+Net sys_phy_tx_en LOC = F4;
+Net sys_phy_tx_er LOC=F3;
+Net sys_phy_gtx_clk LOC=G10;
+
+Net sys_phy_rx_clk LOC=B15;
+Net sys_phy_rx_dv LOC=A9;
+Net sys_phy_rx_er LOC=B9;
+
+Net sys_phy_tx<0> LOC=H1;
+Net sys_phy_tx<1> LOC=H2;
+Net sys_phy_tx<2> LOC=H3;
+Net sys_phy_tx<3> LOC=G1;
+Net sys_phy_tx<4> LOC=G2;
+Net sys_phy_tx<5> LOC=H5;
+Net sys_phy_tx<6> LOC=H6;
+Net sys_phy_tx<7> LOC=G3;
+
+Net sys_phy_rx<0> LOC=F1;
+Net sys_phy_rx<1> LOC=E1;
+Net sys_phy_rx<2> LOC=D4;
+Net sys_phy_rx<3> LOC=C4;
+Net sys_phy_rx<4> LOC=B4;
+Net sys_phy_rx<5> LOC=A4;
+Net sys_phy_rx<6> LOC=B3;
+Net sys_phy_rx<7> LOC=A3;