Refactored after moving of VHDL make

This commit is contained in:
2022-09-07 13:09:41 +02:00
parent cbc093e6e7
commit d3beeb0538
63 changed files with 94 additions and 94 deletions
@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
# -----------------------------------------------------------
PKG_NAME := CIC_DECIM_PIPE
@@ -1,4 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
include cic_decim_pipe.inc
SRCS += $(CIC_DECIM_PIPE_SRCS)
@@ -14,5 +14,5 @@ WAVE_FORMAT := vcd
GHDL_OPTS := -P$(LIB_PATH)/fixed/ieee_proposed/build/fixed_pkg/ieee_proposed
include $(VHDL_HOME)/make/ghdl.mk
include $(VHDL_MAKE_HOME)/ghdl.mk