Refactored after moving of VHDL make

This commit is contained in:
2022-09-07 13:09:41 +02:00
parent cbc093e6e7
commit d3beeb0538
63 changed files with 94 additions and 94 deletions
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/emac/ghdl/emac_tx.inc
include $(LIB_PATH)/emac/ghdl/emac_rx.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
+1 -1
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@@ -1,5 +1,5 @@
# -----------------------------------------------------------
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
# -----------------------------------------------------------
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
+2 -2
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@@ -1,4 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
include emac_jbus.inc
SRCS := $(EMAC_JBUS_SRCS)
@@ -10,5 +10,5 @@ TARGET := tb_emac_top_jb
ENTITY := tb_emac_top_jb
RUN_TIME := 2000us
include $(VHDL_HOME)/make/ghdl.mk
include $(VHDL_MAKE_HOME)/ghdl.mk