Refactored after moving of VHDL make

This commit is contained in:
2022-09-07 13:09:41 +02:00
parent cbc093e6e7
commit d3beeb0538
63 changed files with 94 additions and 94 deletions
@@ -1,4 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_async.inc
MOD_PATH := $(LIB_PATH)/JBUS/busmaster
@@ -15,5 +15,5 @@ ENTITY := tb_busmaster_async
RUN_TIME := 80us
WAVE_FORMAT := vcd
include $(VHDL_HOME)/make/ghdl.mk
include $(VHDL_MAKE_HOME)/ghdl.mk
@@ -1,4 +1,4 @@
include $(VHDL_HOME)/make/defs.mk
include $(VHDL_MAKE_HOME)/defs.mk
include $(LIB_PATH)/FIFO/ghdl/fifo_sync.inc
MOD_PATH := $(LIB_PATH)/JBUS/busmaster
@@ -15,5 +15,5 @@ ENTITY := tb_busmaster_sync
RUN_TIME := 40us
WAVE_FORMAT := vcd
include $(VHDL_HOME)/make/ghdl.mk
include $(VHDL_MAKE_HOME)/ghdl.mk